MAX1403EVKIT Maxim Integrated Products, MAX1403EVKIT Datasheet - Page 6

• Manufacturer Part Number: MAX1403EVKIT
• Description: EVAL KIT FOR MAX1403
• Manufacturer: Maxim Integrated Products

Specifications of MAX1403EVKIT

• Number Of Adc's: 1
• Number Of Bits: 18
• Sampling Rate (per Second): 480
• Data Interface: Serial
• Inputs Per Adc: 6 Single Ended
• Input Range: ±VREF/gain
• Power (typ) @ Conditions: 16.9mW @ 480SPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 70°C
• Utilized Ic / Part: MAX1403
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MAX1403 EV System
Table 1. Guide to Register Bit Functions
6
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REGISTER
TF1, 2, 3
COMMS
DATA
GS1
GS2
SFR
CID2–CID0
BIT NAME
RS2–RS0
FULLPD
0/DRDY
MDOUT
D17–D0
STDBY
FSYNC
X2CLK
G2–G0
RESET
D3–D0
SCAN
BOUT
FAST
BUFF
IOUT
DIFF
MF1
MF0
CLK
R/W
DS1
DS0
FS1
FS0
U/B
M1
M0
A1
A0
Start bit is zero; DIN pin must be 1 when idle.
Register select for subsequent operation
Selects subsequent read or write operation
Causes software reset when set to 1
Activates standby power-down mode when set to 1
Inhibits the A/D converter when set to 1
Selects the active channel
Selects the active channel
Selects the data output rate
Selects the data output rate
Selects the CLKIN frequency
Selects the data output rate
Selects the data output rate
Selects SINC
Enables the scanning sequences
Enables the CalGain channel
Enables the CalOff channel
Enables the input buffers
Selects differential input pairs
Enables the transducer burn-out test currents
Enables the OUT1 and OUT2 current sources (MAX1403 only)
Selects the CLKIN frequency
Changes the DOUT and INT pins to provide raw modulator output
Activates full power-down mode. Use hardware reset to restore normal operation.
All other bits in SFR must be zero
Selects the PGA Gain
Selects unipolar or bipolar coding
Selects the offset correction DAC code; D3 = sign, D2–D0 = magnitude
Raw code value
Value of the DS1 input pin (MAX1403 only)
Value of the DS0 input pin (MAX1403 only)
Channel identification tag
1
filter instead of SINC
DESCRIPTION
3