ISL6559EVAL1 Intersil, ISL6559EVAL1 Datasheet - Page 3

• Manufacturer Part Number: ISL6559EVAL1
• Description: EVALUATION BOARD ISL6559
• Manufacturer: Intersil

Specifications of ISL6559EVAL1

• Main Purpose: Special Purpose DC/DC, VRM Supply
• Outputs And Type: 1, Non-Isolated
• Power - Output: 125W
• Voltage - Output: 1.25V
• Current - Output: 100A
• Voltage - Input: 5V, 12V
• Regulator Topology: Buck
• Frequency - Switching: 600kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6559, ISL6605
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ISL6559 VRM Performance
Soft-Start Interval
The typical start-up waveforms for the ISL6559EVAL1 are
shown in Figure 2. The DAC is set to 01100 (1.250V) and the
converter is started into a 100A load. The OUT_EN jumper is
removed and the voltage on EN quickly rises above the
ISL6559 enable threshold, triggering a soft-start interval. The
switching frequency of the converter is 600kHz, therefore the
soft-start interval (SS Interval) is approximately 3.4ms per
the datasheet. On this evaluation board the 5V linear supply
that is used to power up the controller is disabled when the
enable pin is tied low. This causes the PGOOD pin to float
high until VCC rises above the POR threshold of the
controller and pulls the PGOOD pin low.
The output undervoltage threshold is defined as the DAC
setting minus 350mV. Once this threshold is surpassed, the
internal pull down on the PGOOD pin is released.
Transient Response
The transient slew rate is designed for a nominal 560A/µs,
but can be adjusted as described previously. During a
transient, the core voltage is required to remain within the
static window of ±50mV around the DAC setting. The
on-board load generator and a bench-top electronic load
simulate these conditions.
The OFS pin allows the user to positively offset the DAC
reference voltage by placing a correctly sized resistor from
this pin to ground, R14. For this design, the resistor value is
0Ω, which equates to no offset at no-load. Load-line
regulation is supported by the ISL6559. The average current
of the four active channels flows out I
connected to FB, this average current creates a voltage drop
across R9. This voltage drop is proportional to the output
FIGURE 2. SOFT-START INTERVAL WAVEFORMS
3
OUT
. When this pin is
ENABLE
Application Note 1132
PGOOD
V
OUT
current of the converter and effectively creates an output
voltage droop; the output impedance is 0.91mΩ.
The rising edge transient response of the ISL6559EVAL1 to
the aforementioned maximum load conditions is shown in
Figure 3. A bench-top electronic load draws 0A continuously
from the converter, while the on-board load generator
provides a ~100A load step. This design incorporates an all
ceramic output filter which reduces the effective ESR/ESL
resulting in an excellent transient response with a measured
bandwidth of 140kHz.
Figure 4 shows the load release response of the converter.
There is no overshoot due to the low ESR and ESL of the all
ceramic output capacitor bank and small output inductors
(100nH) employed in this design.
FIGURE 4. FALLING EDGE TRANSIENT RESPONSE
FIGURE 3. RISING EDGE TRANSIENT RESPONSE