CDB4385 Cirrus Logic Inc, CDB4385 Datasheet - Page 38
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CDB4385
Manufacturer Part Number
CDB4385
Description
BOARD EVAL FOR CS4385 DAC
Manufacturer
Cirrus Logic Inc
Specifications of CDB4385
Number Of Dac's
8
Number Of Bits
24
Outputs And Type
8, Differential
Sampling Rate (per Second)
192k
Data Interface
Serial
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CDB4385
Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
For Use With/related Products
CS4385
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1154
38
6.2.3 PCM/DSD Selection (DSD/PCM)
6.2.4 DAC Pair Disable (DACx_DIS)
6.2.5 Power Down (PDN)
6.3
6.3.1 Digital Interface Format (DIF)
DIF3
0
7
PCM Control (address 03h)
Default = 0
0 - PCM
1 - DSD
Function:
This function selects DSD or PCM Mode. The appropriate data and clocks should be present before
changing modes, or else MUTE should be selected.
Default = 0
0 - DAC Pair x Enabled
1 - DAC Pair x Disabled
Function:
When the bit is set, the respective DAC channel pair (AOUTAx and AOUTBx) will remain in a reset state.
It is advised that changes to these bits be made while the power-down (PDN) bit is enabled to eliminate
the possibility of audible artifacts.
Note:
terface Format
Default = 1
0 - Disabled
1 - Enabled
Function:
The entire device will enter a low-power state when this function is enabled, and the contents of the control
registers are retained in this mode. The power-down bit defaults to ‘enabled’ on power-up and must be
disabled before normal operation in Control Port Mode can occur.
Default = 0000 - Format 0 (Left-Justified, up to 24-bit data)
Function:
These bits select the interface format for the serial audio input. The DSD/PCM bit determines whether
PCM or DSD Mode is selected.
The required relationship between the Left/Right clock, serial clock and serial data is defined by the Digital
Interface Format and the options are detailed in
Note:
to ensure proper switching from one mode to another.
When the device is configured in TDM Mode by setting the DIF[3:0] bits to 1100 (see
While in PCM Mode, the DIF bits should only be changed when the power-down (PDN) bit is set
DIF2
6
0
(DIF)), this function is not available and these bits must be set to 0 for proper operation.
DIF1
5
0
DIF0
0
4
Figures 9
Reserved
3
0
through 19.
Reserved
2
0
FM1
1
1
CS4385
Digital In-
DS671F2
FM0
0
1