AD8330-EVALZ Analog Devices Inc, AD8330-EVALZ Datasheet - Page 25

• Manufacturer Part Number: AD8330-EVALZ
• Description: BOARD EVAL FOR AD8330
• Manufacturer: Analog Devices Inc

Specifications of AD8330-EVALZ

• Channels Per Ic: 1 - Single
• Amplifier Type: Variable Gain
• Output Type: Differential, Rail-to-Rail
• Slew Rate: 1500 V/µs
• -3db Bandwidth: 150MHz
• Operating Temperature: -40°C ~ 85°C
• Current - Supply (main Ic): 20mA
• Voltage - Supply, Single/dual (±): 2.7 V ~ 6 V
• Board Type: Fully Populated
• Utilized Ic / Part: AD8330
• Silicon Manufacturer: Analog Devices
• Application Sub Type: Variable Gain Amplifier
• Kit Application Type: Amplifier
• Silicon Core Number: AD8330
• Kit Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

APPLICATIONS INFORMATION
The versatility of the AD8330, its very constant ac response over
a wide range of gains, the large signal dynamic range, output
swing, single supply operation, and low power consumption
commend this VGA to a diverse variety of applications. Only a
few can be described here, including the most basic uses and some
unusual ones.
ADC DRIVING
The AD8330 is well-suited to drive a high speed converter.
There are many high speed converters available, but to illustrate
the general features, the example in this data sheet uses one of
the least expensive, the AD9214. This is available in three
grades for operation at 65 MHz, 80 MHz, and 105 MHz; the
AD9214BRS-80 is a good complement to the general capabili-
ties of this VGA.
Figure 63 shows the connections to drive an ADC. A 3.3 V
supply is used for both parts. The ADC requires that its input
pins be positioned at one third of the supply, or 1.1 V. Given
that the default output level of the VGA is one-half the supply
or 1.65 V, a small correction is introduced by the 8 kΩ resistor
from CNTR to ground. The ADC specifications require that the
common-mode input be within ±0.2 V of the nominal 1.1 V;
variations of up to ±20% in the AD8330 on-chip resistors change
this voltage by only ±70 mV. With the connections shown in
Figure 63, the AD9214 is able to receive an input of 2 V p-p; the
peak output of the AD8330 can be reduced if desired by adding
a resistor
INPUT,
±2V MAX
10Ω
0.1µF
NC
GAIN BIAS,
V
DBS
, 0V–1.5V
VPSI
INHI
INLO
MODE
ENBL
VDBS
BIAS AND
VGA CORE
GAIN INTERFACE
V-REF
OFST
CMGN
Figure 63. Driving an Analog-to-Digital Converter (Preliminary)
CHPF
OFFSET CONTROL
CM MODE AND
VPOS
COMM
OUTPUT
STAGES
CONTROL
OUTPUT
ANALOG GROUND
0.1µF
CNTR
NC
VMAG
OPLO
CMOP
VPSO
Rev. E | Page 25 of 32
OPHI
8kΩ
0.1µF
0.1µF
from VMAG to ground. An overrange condition is signaled by a
high state on Pin OR of the AD9214. DFS/GAIN is unconnected
in this example producing an offset-binary output. To provide a
twos complement output, it should be connected to the REF pin.
For ADCs running at sampling rates substantially below the
bandwidth of the AD8330, an intervening noise filter is
recommended to limit the noise bandwidth. A one-pole filter
can easily be created with a single differential capacitor between
the OPHI and OPLO outputs. For a corner frequency of f
capacitor should have a value of
For example, a 10 MHz corner requires about 100 pF.
SIMPLE AGC AMPLIFIER
Figure 64 illustrates the use of the inverted gain mode and the
offset gain range (0.2 V < V
AGC loop. Q1 is used as a detector. When OPHI is sufficiently
higher than CNTR, due to the signal swing, it conducts and
charges C1. This raises V
that MODE is grounded (see Figure 48). The minimum voltage
needed across R1 to set up the full gain is 0.2 V because CMGN
is dc open-circuited (this does not alter V
mum voltage is 1.7 V.
PWRDN
DFS/GAIN
A
A
REFSENSE
REF
IN
IN
AV
C
AGND
FILT
DD
= 1/942 f
AD9214BRS-80
3.3Ω
RANGE
OVER-
CLOCK
OR
CLK
C
DBS
DBS
DrV
and rapidly lowers the gain. Note
DGND
GROUND
DIGITAL
3.3Ω
< 1.7 V) in supporting a low cost
DD
0.1µF
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
V
S
, 3.3V
MAG
) and the maxi-
AD8330
C
, the
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