ATTINY20-EK1 Atmel, ATTINY20-EK1 Datasheet - Page 40
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ATTINY20-EK1
Manufacturer Part Number
ATTINY20-EK1
Description
KIT EVAL TOUCH ATTINY20
Manufacturer
Atmel
Datasheet
1.ATTINY20-EK1.pdf
(224 pages)
Specifications of ATTINY20-EK1
Sensor Type
*
Sensing Range
*
Interface
*
Sensitivity
*
Voltage - Supply
*
Embedded
*
Utilized Ic / Part
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
TinyAVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
ATtiny20
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
Tool Type
Development Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor To Be Evaluated
ATtiny20
Interface Type
Touch
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.2.1
9.2.2
40
ATtiny20
Low Level Interrupt
Pin Change Interrupt Timing
A low level interrupt on INT0 is detected asynchronously. This means that the interrupt source
can be used for waking the part also from sleep modes other than Idle (the I/O clock is halted in
all sleep modes except Idle).
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no inter-
rupt will be generated. The start-up time is defined as described in
If the low level on the interrupt pin is removed before the device has woken up then program
execution will not be diverted to the interrupt service routine but continue from the instruction fol-
lowing the SLEEP command.
A timing example of a pin change interrupt is shown in
Figure 9-1.
pcint_setflag
pcint_in_(0)
PCINT(0)
pcint_syn
pin_sync
pin_lat
PCINT(0)
PCIF
clk
clk
Timing of pin change interrupts
LE
pin_lat
D
Q
pin_sync
PCINT(0) in PCMSK(x)
pcint_in_(0)
0
x
clk
Figure
9-1.
“Clock System” on page
pcint_syn
pcint_setflag
8235B–AVR–04/11
PCIF
18.
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