EVAL-ADUC842QS Analog Devices Inc, EVAL-ADUC842QS Datasheet - Page 26
EVAL-ADUC842QS
Manufacturer Part Number
EVAL-ADUC842QS
Description
KIT DEV FOR ADUC842 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Datasheet
1.EVAL-ADUC842QS.pdf
(88 pages)
Specifications of EVAL-ADUC842QS
Contents
Evaluation Board, Power Supply, Cable, Software and Documentation
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
ADuC842
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
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ADuC841/ADuC842/ADuC843
ADCCON3—(ADC Control SFR 3)
The ADCCON3 register controls the operation of various
calibration modes and also indicates the ADC busy status.
SFR Address
SFR Power-On Default
Bit Addressable
Table 9. ADCCON3 SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
Name
BUSY
RSVD
AVGS1
AVGS0
RSVD
RSVD
TYPICAL
SCAL
Description
ADC Busy Status Bit.
A read-only status bit that is set during a valid ADC conversion or during a calibration cycle.
Busy is automatically cleared by the core at the end of conversion or calibration.
Reserved. This bit should always be written as 0.
Number of Average Selection Bits.
This bit selects the number of ADC readings that are averaged during a calibration cycle.
AVGS1
0
0
1
1
Reserved. This bit should always be written as 0.
This bit should always be written as 1 by the user when performing calibration.
Calibration Type Select Bit.
This bit selects between offset (zero-scale) and gain (full-scale) calibration.
Set to 0 for offset calibration.
Set to 1 for gain calibration.
Start Calibration Cycle Bit.
When set, this bit starts the selected calibration cycle.
It is automatically cleared when the calibration cycle is completed.
F5H
00H
No
AVGS0
0
1
0
1
Rev. 0 | Page 26 of 88
Number of Averages
15
1
31
63
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