EVAL-ADUC842QS Analog Devices Inc, EVAL-ADUC842QS Datasheet - Page 39

• Manufacturer Part Number: EVAL-ADUC842QS
• Description: KIT DEV FOR ADUC842 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC842QS

• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: ADuC842
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant

Using the DAC
The on-chip DAC architecture consists of a resistor string DAC
followed by an output buffer amplifier, the functional equivalent
of which is illustrated in Figure 42. Details of the actual DAC
architecture can be found in U.S. Patent Number 5969657
(www.uspto.gov). Features of this architecture include inherent
guaranteed monotonicity and excellent differential linearity.
As shown in Figure 42, the reference source for each DAC is
user selectable in software. It can be either AV
0 V-to-AV
from 0 V to the voltage at the AV
the DAC output transfer function spans from 0 V to the internal
V
pin. The DAC output buffer amplifier features a true rail-to-rail
output stage implementation. This means that unloaded, each
output is capable of swinging to within less than 100 mV of
both AVDD and ground. Moreover, the DAC’s linearity specifica-
tion (when driving a 10 kΩ resistive load to ground) is guaranteed
through the full transfer function except Codes 0 to 100, and, in
0 V-to-AVDD mode only, Codes 3995 to 4095. Linearity degrada-
tion near ground and V
amplifier, and a general representation of its effects (neglecting
offset and gain error) is illustrated in Figure 43. The dotted line
in Figure 43 indicates the ideal transfer function, and the solid
line represents what the transfer function might look like with
endpoint nonlinearities due to saturation of the output amplifier.
Note that Figure 43 represents a transfer function in 0 V-to-V
mode only. In 0 V-to-V
nonlinearity would be similar, but the upper portion of the
transfer function would follow the ideal line right to the end
(V
linearity errors.
REF
REF
or, if an external reference is applied, the voltage at the C
in this case, not V
AV
V
DD
Figure 42. Resistor String DAC Functional Equivalent
REF
DD
mode, the DAC output transfer function spans
ADuC841/ADuC842
R
R
R
R
R
REF
DD
DD
), showing no signs of endpoint
mode (with V
is caused by saturation of the output
DD
(FROM MCU)
pin. In 0 V-to-V
DISABLE
OUTPUT
BUFFER
HIGH Z
REF
< V
DD
DD
or V
), the lower
DAC0
REF
REF
mode,
. In
Rev. 0 | Page 39 of 88
DD
REF
V
V
DD
DD
–100mV
–50mV
100mV
50mV
Figure 44. Source and Sink Current Capability with V
Figure 45. Source and Sink Current Capability with V
0mV
V
Figure 43. Endpoint Nonlinearities Due to Amplifier Saturation
DD
4
3
1
0
5
4
3
2
1
0
0
0
000H
DAC LOADED WITH 0FFFH
DAC LOADED WITH 0000H
ADuC841/ADuC842/ADuC843
SOURCE/SINK CURRENT (mA)
SOURCE/SINK CURRENT (mA)
5
5
DAC LOADED WITH 0FFFH
DAC LOADED WITH 0000H
10
10
REF
REF
= V
= V
DD
DD
= 5 V
= 3 V
15
15
FFFH