DK-DEV-3SL150N Altera, DK-DEV-3SL150N Datasheet - Page 19

• Manufacturer Part Number: DK-DEV-3SL150N
• Description: KIT DEVELOPMENT STRATIX III
• Manufacturer: Altera
• Series: Stratix® IIIr
• Type: FPGAr

Specifications of DK-DEV-3SL150N

• Contents: Development Platform, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP3S
• Silicon Family Name: Stratix III
• Kit Contents: Development Board, Cable And Accessories
• Rohs Compliant: Yes
• For Use With/related Products: EP3SL150F152
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2568

Introduction
Power Design Example
Table 5–1. Four Input Button Functionality
© August 2008 Altera Corporation
User Push
User_PB0
User_PB1
User_PB2
User_PB3
Button
FPGA Pin
B17
A17
A16
K17
One of the main features of the Stratix III FPGA device is its low power consumption.
You can measure the power used by the 3SL150 FPGA device on the Stratix III
development board for various conditions with a power design example provided
with the kit.
With the power design example, you can control the amount of logic utilized in the
FPGA, the clock frequency, and the number of I/Os used, and measure the effect on
power used by the Stratix III device.
The power design example uses a replicated module, stamp.v, that contains
combinational logic, randomly filled ROMs, multiplier blocks, and shift registers that
change with every clock cycle. The frequency and resource states indicated in
Table 5–2
used. As compiled, the full example design uses the following FPGA resources:
■
■
■
■
■
■
■
Table 5–1
power design example. The on-board 50-MHz oscillator provides the input clock
(i_clk, PIN_T33).
Combinational adaptive look-up tables (ALUTs): 1,872 / 113,600 (2%)
Dedicated logic registers: 106,640 / 113,600 (94%)
Total registers: 106,640
Total pins: 173 / 744 (23%)
Total memory bits: 2,621,440 / 5,630,976 (47%)
Embedded multiplier 18-bit elements: 320 / 384 (83%)
Total PLLs: 1/8 (13%)
Reset
Toggle
Toggle
Toggle
Type
and
describes the functionality of the four user push buttons that control the
Table 5–3 on page
Resets the demo to the beginning, i_nrst
Advances the design example to the next higher frequency, i_nfreq_next
Advances the design example to the next higher resource utilization,
i_nperc_next
Enables the outputs to toggle, i_noutput_ena
5–2, respectively, represent the percent of full design
Description
5. Power Measurement
Stratix III Development Kit User Guide