DK-DEV-3SL150N Altera, DK-DEV-3SL150N Datasheet - Page 20

• Manufacturer Part Number: DK-DEV-3SL150N
• Description: KIT DEVELOPMENT STRATIX III
• Manufacturer: Altera
• Series: Stratix® IIIr
• Type: FPGAr

Specifications of DK-DEV-3SL150N

• Contents: Development Platform, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP3S
• Silicon Family Name: Stratix III
• Kit Contents: Development Board, Cable And Accessories
• Rohs Compliant: Yes
• For Use With/related Products: EP3SL150F152
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2568

5–2
Stratix III Development Kit User Guide
The LEDs in
User_PB1 advances frequency.
Table 5–2. Power State Indicators for Frequency
The LEDs in
number of output pins, when enabled by User_PB3) as User_PB2 advances resource
utilization.
Table 5–3. Power State Indicators for Resources
The resource state
increment adds eight additional I/O pins
frequency
LED1 (C23)
LED6
(F19)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
(Table
Table 5–2
Table 5–3
(C19)
LED5
5–2) sets the toggle frequency of these I/O pins.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
(Table
LED0 (F21)
indicate the power-state values of the design example as
indicate the power-state values of the design example (and
0
1
0
1
5–3) controls the number of I/O pins used. Each resource
(D19)
LED4
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
Frequency (MHz)
100
33
67
0
(A23)
LED3
(Table
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
5–3). Similarly, the overall design
(B23)
LED2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
© August 2008 Altera Corporation
Chapter 5: Power Measurement
Resources
100
(%)
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
5
Power Design Example
Number of
Outputs
104
112
120
128
136
144
152
160
16
24
32
40
48
56
64
72
80
88
96
8