OM13000 NXP Semiconductors, OM13000 Datasheet - Page 11

• Manufacturer Part Number: OM13000
• Description: BOARD LPCXPRESSO LPC1768
• Manufacturer: NXP Semiconductors
• Type: MCUr
• Series: LPCXpressor

Specifications of OM13000

• Contents: Board
• Svhc: No SVHC (18-Jun-2010)
• Mcu Supported Families: LPC1768
• Silicon Family Name: LPC17xx
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Ic Product Type: Debugger
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: LPC1768
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5101

NXP Semiconductors
4. AC/DC deviations detail
5. Errata notes detail
ES_LPC176X
Errata sheet
3.9 PWM.1: When updating the duty cycle for PWM1.1 from 100 %, in
4.1 n/a
5.1 Note.1 (LPC1769/68/66/65/64 only)
some cases the output can stay low for a full PWM period before the
update takes effect
Introduction:
On the LPC176x PWM peripheral, two match registers can be used to provide a single
edge controlled PWM output. One match register (PWM1MR0) controls the PWM cycle
rate, by resetting the count upon match. The other match register controls the PWM edge
position. As an example, match register PWM1MR1 controls PWM1's edge position.
Multiple single edge controlled PWM outputs will all have a rising edge at the beginning of
each PWM cycle, when a PWM1MR0 match occurs.
Problem:
Only in single-edge mode, if the duty cycle for PWM1.1 (Pulse Width Modulator 1, channel
1 output) is updated from 100 % (PWM1MR1 = PWM1MR0), then the output for PWM1.1
could unexpectedly remain low for a full PWM period before the new desired duty cycle
takes effect. This problem only affects the output for PWM1.1. Other PWM channels
(PWM1.2 to PWM1.6) are not affected by this problem.
Work-around:
A software fix can be implemented where the user can load PWM1MR1 with
PWM1MR0 + 1 (at least 1) to avoid any delays in the PWM1.1's output update.
On the LPC176x, for USB operation, the supply voltage (V

3.6 V.
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 22 March 2011
Errata sheet LPC1769/68/67/66/65/64/63
DD(3V3)
) range must be 3.0 V
ES_LPC176x
© NXP B.V. 2011. All rights reserved.

V
DD(3V3)
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