OM13000 NXP Semiconductors, OM13000 Datasheet - Page 7

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OM13000

Manufacturer Part Number
OM13000
Description
BOARD LPCXPRESSO LPC1768
Manufacturer
NXP Semiconductors
Type
MCUr
Series
LPCXpressor
Datasheets

Specifications of OM13000

Contents
Board
Svhc
No SVHC (18-Jun-2010)
Mcu Supported Families
LPC1768
Silicon Family Name
LPC17xx
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Ic Product Type
Debugger
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
LPC1768
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5101

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NXP Semiconductors
ES_LPC176X
Errata sheet
3.4 PLL0.1: PLL0 (Main PLL) remains enabled and connected in Deep
Sleep and Power-down modes
Introduction:
If the main PLL (PLL0) is enabled and connected before entering Deep Sleep or
Power-down modes, main PLL (PLL0) automatically turns off and disconnects after the
chip enters Deep Sleep mode or Power-down mode leading to reduced power
consumption.
Problem:
If the main PLL (PLL0) is enabled and connected before entering Deep Sleep or
Power-down modes, it will remain enabled and connected after the chip enters Deep
Sleep mode or Power-down mode causing the power consumption to be higher.
Work-around:
In the software, user must disable and disconnect the main PLL (PLL0) before entering
Deep Sleep and Power-down modes to reduce the power consumption. This must be
done only if the main PLL (PLL0) was enabled and connected before entering Deep Sleep
mode or Power-down mode.
The code below demonstrates the steps to disable and disconnect the main PLL0:
PLL0CON &= ~(1<<1);
PLL0FEED = 0xAA;
PLL0FEED = 0x55;
while ((PLL0STAT & (1<<25)) != 0x00); /* Wait for main PLL (PLL0) to disconnect */
PLL0CON &= ~(1<<0);
PLL0FEED = 0xAA;
PLL0FEED = 0x55;
while ((PLL0STAT & (1<<24)) != 0x00); /* Wait for main PLL (PLL0) to shut down */
/************** Then enter into Deep sleep mode or Power-down mode*****************/
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 22 March 2011
/* Disconnect the main PLL (PLL0) */
/* Feed */
/* Feed */
/* Turn off the main PLL (PLL0) */
/* Feed */
/* Feed */
Errata sheet LPC1769/68/67/66/65/64/63
ES_LPC176x
© NXP B.V. 2011. All rights reserved.
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