ADZS-21469-EZBRD Analog Devices Inc, ADZS-21469-EZBRD Datasheet - Page 24

• Manufacturer Part Number: ADZS-21469-EZBRD
• Description: KIT EVAL EZ BOARD ADSP-21469
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: DSPr

Specifications of ADZS-21469-EZBRD

• Contents: Board
• Silicon Manufacturer: Analog Devices
• Core Architecture: SHARC
• Features: External JTAG Emulator, Standalone Debug Agent Board
• Kit Contents: Board Cables CD Docs
• Silicon Core Number: ADSP-21469
• Silicon Family Name: SHARC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADSP-2146x
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADSP-21462/ADSP-21465/ADSP-21467/ADSP-21469
Reset
Table 16. Reset
1
Running Reset
The following timing specification applies to CLKOUT/
RESETOUT/RUNRSTIN pin when it is configured as
RUNRSTIN.
Table 17. Running Reset
Parameter
Timing Requirements
t
t
Parameter
Timing Requirements
t
t
Applies after the power-up sequence is complete. At power-up, the processor’s internal phase-locked loop requires no more than 100 ms while RESET is low, assuming stable
WRST
SRST
WRUNRST
SRUNRST
V
DD
and CLKIN (not including start-up time of external clock oscillator).
1
RESET Pulse Width Low
RESET Setup Before CLKIN Low
Running RESET Pulse Width Low
Running RESET Setup Before CLKIN High
RUNRSTIN
RESET
CLKIN
CLKIN
Rev. PrC | Page 24 of 62 | January 2009
t WRUNRST
Figure 8. Running Reset
t
Figure 7. Reset
WRST
Min
TBD
TBD
Min
TBD
TBD
t SRUNRST
t
SRST
Preliminary Technical Data
Max
TBD
TBD
Max
TBD
TBD
Unit
ns
ns
Unit
ns
ns