Z8F08200100KITG Zilog, Z8F08200100KITG Datasheet - Page 66

• Manufacturer Part Number: Z8F08200100KITG
• Description: DEV KIT FOR Z8 ENCORE 8K/4K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KITG

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• Rohs Compliant: Yes
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4630

Table 19. Port A–C High Drive Enable Sub-Registers
Table 20. Port A–C Stop Mode Recovery Source Enable Sub-Registers
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
7
7
PSMRE7
PHDE7
If 04H in Port A–C Address Register, accessible through the Port A–C Control Register
If 05H in Port A–C Address Register, accessible through the Port A–C Control Register
1 = The drain of the associated pin is disabled (open-drain mode).
Port A–C High Drive Enable Sub-Registers
The Port A–C High Drive Enable sub-register
Port A–C Control Register by writing
bits in the Port A–C High Drive Enable sub-registers to 1 configures the specified port
pins for high current output drive operation. The Port A–C High Drive Enable sub-register
affects the pins directly and, as a result, alternate functions are also affected.
PHDE[7:0]—Port High Drive Enabled
0 = The Port pin is configured for standard output current drive.
1 = The Port pin is configured for high output current drive.
Port A–C Stop Mode Recovery Source Enable Sub-Registers
The Port A–C Stop Mode Recovery Source Enable sub-register
through the Port A–C Control Register by writing
Setting the bits in the Port A–C Stop Mode Recovery Source Enable sub-registers to 1
configures the specified Port pins as a Stop Mode Recovery source. During STOP Mode,
any logic transition on a Port pin enabled as a Stop Mode Recovery source initiates Stop
Mode Recovery.
PSMRE[7:0]—Port Stop Mode Recovery Source Enabled
0 = The port pin is not configured as a Stop Mode Recovery source. Transitions on
alternate function).
this pin during STOP mode does not initiate Stop Mode Recovery.
6
6
PSMRE6
PHDE6
5
5
PSMRE5
PHDE5
4
4
PSMRE4
PHDE4
04H
R/W
R/W
0
0
3
3
to the Port A–C Address Register. Setting the
PSMRE3
PHDE3
(Table
05H
19) is accessed through the
2
2
to the Port A–C Address Register.
PSMRE2
Z8 Encore! XP
PHDE2
General-Purpose Input/Output
(Table
Product Specification
1
1
PSMRE1
PHDE1
20) is accessed
®
F0822 Series
0
0
PSMRE0
PHDE0
53