MPC8313E-RDBB Freescale Semiconductor, MPC8313E-RDBB Datasheet - Page 26
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MPC8313E-RDBB
Manufacturer Part Number
MPC8313E-RDBB
Description
BOARD CPU 8313E VER 2.1
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr
Datasheets
1.MPC8313CZQAFFB.pdf
(100 pages)
2.MPC8313E-RDBB.pdf
(52 pages)
3.MPC8313E-RDBB.pdf
(2 pages)
Specifications of MPC8313E-RDBB
Contents
Board
Processor To Be Evaluated
MPC8xxx
Data Bus Width
32 bit
Interface Type
Ethernet, USB, JTAG, SPI, UART
Dimensions
170 mm x 170 mm
Operating Supply Voltage
3.3 V
For Use With/related Products
MPC8313E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ethernet: Three-Speed Ethernet, MII Management
Figure 12
Figure 13
8.2.2
Table 30
26
At recommended operating conditions with NV
At recommended operating conditions with LV
REF_CLK clock fall time V
Note:
1. The symbols used for timing specifications follow the pattern of t
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Clock cycle duration
Duty cycle for 1000Base-T
inputs and t
receive timing (RMR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
reference (K) going to the high (H) state or setup time. Also, t
the time data input signals (D) went invalid (X) relative to the t
Note that, in general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For example, the subscript of t
convention is used with the appropriate letter: R (rise) or F (fall).
presents the RGMII and RTBI AC timing specifications.
provides the AC test load.
shows the RMII receive AC timing diagram.
RGMII and RTBI AC Timing
(first two letters of functional block)(reference)(state)(signal)(state)
REF_CLK
RXD[1:0]
CRS_DV
Parameter/Condition
Parameter/Condition
RX_ER
3
MPC8313E PowerQUICC
IH
Table 29. RMII Receive AC Timing Specifications (continued)
4, 5
Output
(max) to V
Table 30. RGMII and RTBI AC Timing Specifications
Figure 13. RMII Receive AC Timing Diagram
2
t
RMRDVKH
t
IL
RMXH
(min)
DDA
DD
RMX
of 3.3 V ± 0.3 V.
/LV
t
DDB
RMX
represents the RMII (RM) reference (X) clock. For rise and fall times, the latter
Figure 12. AC Test Load
™
Z
0
of 2.5 V ± 5%.
II Pro Processor Hardware Specifications, Rev. 3
= 50 Ω
Valid Data
Specifications
RMRDXKL
RMX
t
t
RGTH
Symbol
Symbol
RMXF
t
t
t
SKRGT
SKRGT
(first three letters of functional block)(signal)(state)(reference)(state)
RMXF
t
RGT
for outputs. For example, t
clock reference (K) going to the low (L) state or hold time.
/t
RGT
symbolizes RMII receive timing (RMR) with respect to
1
1
R
t
L
RMRDXKH
t
RMXR
= 50 Ω
–0.5
Min
Min
1.0
1.0
7.2
45
NV
DD
RMRDVKH
Typ
Typ
8.0
50
—
—
—
/2
Freescale Semiconductor
symbolizes RMII
Max
Max
4.0
0.5
2.8
8.8
55
RMX
clock
Unit
Unit
ns
ns
ns
ns
%
for