DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 43

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

Chapter 2: Board Components
Components and Interfaces
Table 2–37. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 3 of 4)
February 2011 Altera Corporation
J2.103
J2.104
J2.107
J2.108
J2.109
J2.110
J2.113
J2.114
J2.115
J2.116
J2.119
J2.120
J2.121
J2.122
J2.125
J2.126
J2.127
J2.128
J2.131
J2.132
J2.133
J2.134
J2.137
J2.138
J2.139
J2.140
J2.143
J2.144
J2.145
J2.146
J2.149
J2.150
J2.151
J2.152
J2.155
J2.156
J2.157
J2.158
Reference
Board
LVDS TX bit 8n or CMOS bit 42
LVDS RX bit 8n or CMOS bit 43
LVDS TX bit 9 or CMOS bit 44
LVDS RX bit 9 or CMOS bit 45
LVDS TX bit 9n or CMOS bit 46
LVDS RX bit 9n or CMOS bit 47
LVDS TX bit 10 or CMOS bit 48
LVDS RX bit 10 or CMOS bit 49
LVDS TX bit 10n or CMOS bit 50
LVDS RX bit 10n or CMOS bit 51
LVDS TX bit 11 or CMOS bit 52
LVDS RX bit 11 or CMOS bit 53
LVDS TX bit 11n or CMOS bit 54
LVDS RX bit 11n or CMOS bit 55
LVDS TX bit 12 or CMOS bit 56
LVDS RX bit 12 or CMOS bit 57
LVDS TX bit 12n or CMOS bit 58
LVDS RX bit 12n or CMOS bit 59
LVDS TX bit 13 or CMOS bit 60
LVDS RX bit 13 or CMOS bit 61
LVDS TX bit 13n or CMOS bit 62
LVDS RX bit 13n or CMOS bit 63
LVDS TX bit 14 or CMOS bit 64
LVDS RX bit 14 or CMOS bit 65
LVDS TX bit 14n or CMOS bit 66
LVDS RX bit 14n or CMOS bit 67
LVDS TX bit 15 or CMOS bit 68
LVDS RX bit 15 or CMOS bit 69
LVDS TX bit 15n or CMOS bit 70
LVDS RX bit 15n or CMOS bit 71
LVDS TX bit 16 or CMOS bit 72
LVDS RX bit 16 or CMOS bit 73
LVDS TX bit 16n or CMOS bit 74
LVDS RX bit 16n or CMOS bit 75
LVDS or CMOS clock out 2 or CMOS bit 76
LVDS or CMOS clock in 2 or CMOS bit 77
LVDS or CMOS clock out 2 or CMOS bit 78
LVDS or CMOS clock in 2 or CMOS bit 79
Description
Schematic Signal
HSMA_CLKOUT_P2
HSMA_CLKOUT_N2
HSMA_TX_D_P10
HSMA_RX_D_P10
HSMA_TX_D_N10
HSMA_RX_D_N10
HSMA_TX_D_P11
HSMA_RX_D_P11
HSMA_TX_D_N11
HSMA_RX_D_N11
HSMA_TX_D_P12
HSMA_RX_D_P12
HSMA_TX_D_N12
HSMA_RX_D_N12
HSMA_TX_D_P13
HSMA_RX_D_P13
HSMA_TX_D_N13
HSMA_RX_D_N13
HSMA_TX_D_P14
HSMA_RX_D_P14
HSMA_TX_D_N14
HSMA_RX_D_N14
HSMA_TX_D_P15
HSMA_RX_D_P15
HSMA_TX_D_N15
HSMA_RX_D_N15
HSMA_TX_D_P16
HSMA_RX_D_P16
HSMA_TX_D_N16
HSMA_RX_D_N16
HSMA_CLKIN_P2
HSMA_CLKIN_N2
HSMA_TX_D_N8
HSMA_RX_D_N8
HSMA_TX_D_P9
HSMA_RX_D_P9
HSMA_TX_D_N9
HSMA_RX_D_N9
Name
Arria II GX FPGA Development Board Reference Manual
LVDS or 2.5-V
I/O Standard
Pin Number
Arria II GX
Device
W10
W12
AA4
AC3
AC2
AB4
AB3
AB6
AB5
AB8
AB7
U11
AC7
U10
AC6
V11
V10
V12
K18
W7
W4
W6
W3
J18
U2
U1
R7
R2
U7
Y6
V1
Y5
Y4
Y3
Y9
T7
P1
V7
2–35