MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 104

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

T
T
-JITTER
V
RL
RL
Z
Z
Z
V
T
ENTERTIME
PCI Express
104
RX-EYE
RX-EYE-MEDIAN-to-MAX
RX-CM-ACp
RX-DIFF-DC
RX-DC
RX-HIGH-IMP-DC
RX-IDLE-DET-DIFFp-p
RX-IDLE-DET-DIFF-
RX-DIFF
RX-CM
Symbol
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Table 72. Differential Receiver (RX) Input Specifications (continued)
Minimum
Receiver Eye
Width
Maximum time
between the jitter
median and
maximum
deviation from
the median.
AC Peak
Common Mode
Input Voltage
Differential
Return Loss
Common Mode
Return Loss
DC Differential
Input Impedance
DC Input
Impedance
Powered Down
DC Input
Impedance
Electrical Idle
Detect Threshold
Unexpected
Electrical Idle
Enter Detect
Threshold
Integration Time
Parameter
200 k
Min
0.4
—
—
15
80
40
65
—
6
Nom
100
—
—
—
—
—
50
—
—
—
Max
150
120
175
0.3
60
10
—
—
—
—
Units
mV
mV
ms
dB
dB
UI
UI
Ω
Ω
Ω
The maximum interconnect media and
Transmitter jitter that can be tolerated by the
Receiver can be derived as T
1 - T
See Notes 2 and 3.
Jitter is defined as the measurement variation
of the crossing points (V
relation to a recovered TX UI. A recovered TX
UI is calculated over 3500 consecutive unit
intervals of sample data. Jitter is measured
using all edges of the 250 consecutive UI in
the center of the 3500 UI used for calculating
the TX UI. See Notes 2, 3 and 7.
V
V
See Note 2
Measured over 50 MHz to 1.25 GHz with the
D+ and D- lines biased at +300 mV and –300
mV, respectively.
See Note 4
Measured over 50 MHz to 1.25 GHz with the
D+ and D- lines biased at 0 V. See Note 4
RX DC Differential mode impedance. See
Note 5
Required RX D+ as well as D- DC Impedance
(50 ± 20% tolerance). See Notes 2 and 5.
Required RX D+ as well as D– DC
Impedance when the Receiver terminations
do not have power. See Note 6.
V
Measured at the package pins of the Receiver
An unexpected Electrical Idle (V
V
longer than T
signal an unexpected idle condition.
RX-CM-ACp
RX-CM-DC
RX-IDLE-DET-DIFFp-p
RX-IDLE-DET-DIFFp-p
RX-EYE
= DC
= 0.6 UI.
= |V
RX-IDLE-DET-DIFF-ENTERING
RXD+
(avg)
Comments
Freescale Semiconductor
) must be recognized no
= 2*|V
of |V
– V
RX-DIFFp-p
RXD-
RX-D+
RX-D+
RX-MAX-JITTER
|/2 +V
+V
RX-DIFFp-p
–V
= 0 V) in
RX-D-
RX-CM-DC
RX-D-
|/2
to
|
<
=