ATEVK1104S Atmel, ATEVK1104S Datasheet - Page 40

KIT EVAL FOR AT32UC

ATEVK1104S

Manufacturer Part Number
ATEVK1104S
Description
KIT EVAL FOR AT32UC
Manufacturer
Atmel
Series
AVR®32 UC3r
Type
MCUr
Datasheets

Specifications of ATEVK1104S

Contents
Board, Cables
Tool Type
Development Kit
Cpu Core
AVR 32
Data Bus Width
32 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3A3256S
Interface Type
USB, JTAG, SD Card, Nexus, MMC
Core Architecture
AVR
Operating Supply Voltage
5.5 V
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.4.11
8.4.12
8.4.13
32072C–AVR32–2010/03
Peripheral DMA Controller
DMA Controller
General-Purpose Input/Output Controller
Serial Peripheral Interface
Energy-saving capabilities
Error detection
SDRAM power-up initialization by software
CAS latency of one, two, and three supported
Auto Precharge command not used
Multiple channels
Generates transfers to/from peripherals such as USART and SPI
Two address pointers/counters per channel allowing double buffering
Performance monitors to measure average and maximum transfer latency
2 HSB Master Interfaces
Channels
Software and Hardware Handshaking Interfaces
Memory/Non-Memory Peripherals to Memory/Non-Memory Peripherals Transfer
Single-block DMA Transfer
Multi-block DMA Transfer
DMA Controller is Always the Flow Controller
Additional Features
Each I/O line of the GPIO features:
Configurable pin-change, rising-edge or falling-edge interrupt on any I/O line
A glitch filter providing rejection of pulses shorter than one clock cycle
Input visibility and output control
Multiplexing of up to four peripheral functions per I/O line
Programmable internal pull-up resistor
Compatible with an embedded 32-bit microcontroller
Supports communication with serial external devices
– Timing parameters specified by software
– Automatic refresh operation, refresh rate is programmable
– Automatic update of DS, TCR and PASR parameters (mobile SDRAM devices)
– Self-refresh, power-down, and deep power-down modes supported
– Supports mobile SDRAM devices
– Refresh error interrupt
– 9 Hardware Handshaking Interfaces
– Linked Lists
– Auto-Reloading
– Contiguous Blocks
– Scatter and Gather Operations
– Channel Locking
– Bus Locking
– FIFO Mode
– Pseudo Fly-by Operation
– Four chip selects with external decoder support allow communication with up to 15
peripherals
AT32UC3A3/A4
40

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