45205 Parallax Inc, 45205 Datasheet - Page 88
![SX TECH BOARD](/photos/28/95/289537/45205-l_sml.jpg)
45205
Manufacturer Part Number
45205
Description
SX TECH BOARD
Manufacturer
Parallax Inc
Type
MCUr
Datasheet
1.45180.pdf
(184 pages)
Specifications of 45205
Contents
Board
For Use With/related Products
SX MCUs
For Use With
28825 - MINI SOUND PLAYER SOUNDPAL130-28029 - KIT PARTS SMART SENSORS
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 88 of 184
- Download datasheet (2Mb)
10 SX Special Features and Coding Tips
10.2.1 Port Direction
Each of the I/O pins in each of the ports can be configured to an input or output direction by writing to
the appropriate tristate register (TRIS_A, TRIS_B, TRIS_C, TRIS_D and TRIS_E). The default I/O pin
direction is input. I/O pin direction configuration is usually done once, near the start of code, however,
the pin directions can be changed multiple times at any place in the code.
To configure the direction of the I/O pins to inputs or outputs:
The following code snippet demonstrates this:
If the logic-level of output pins are expected to begin at a certain state (0 or 1), care should be taken to
set the output latch appropriately before setting the pin’s direction to output. Failing to do so may result
in a momentary glitch on the pin during initialization. For example, if all output pins were expected to
begin in a low state (0), insert the following lines above the previous code snippet:
Page 88 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc.
1) Set the MODE register to $0F (the default value at startup).
2) Use the port configuration instruction to set the individual directions of each I/O pin within each
port. A high bit (1) sets the corresponding pin to input mode and a low bit (0) sets the pin to out-
put mode.
; Direction Configuration
;
MODE $0F
MOV
MOV
MOV
* Port C not available on SX20 devices, Port D and E only available on SX48/52 devices.
NOTE: More options exist for the SX48/52 parts. See chapter 15.4.2 for details.
$07 - $00
MODE
$0D
$0C
$0A
$0F
$0E
$0B
$09
$08
!ra,#%0000
!rb,#%11110000 ; Port B bits 4-7 to input, bits 0-3 output
!rc,#%00001111 ; Port C bits 4-7 to output, bits 0-3 input
TRIS_A
Port A
LVL_A
PLP_A
; Set Mode to allow Direction configuration
; Port A bits 0-3 to output
Table 20 - MODE Register Settings
Swap W with WKPEN_B
Swap W with COMP_B
WKEN_B
WKED_B
Port B
TRIS_B
LVL_B
PLP_B
ST_B
Port C*
TRIS_C
PLP_C
LVL_C
ST_C
Port D*
TRIS_D
LVL_D
PLP_D
ST_D
Port E*
TRIS_E
LVL_E
PLP_E
ST_E
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