C8051F005-TB Silicon Laboratories Inc, C8051F005-TB Datasheet - Page 133

• Manufacturer Part Number: C8051F005-TB
• Description: BOARD PROTOTYPING W/C8051F005
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F005-TB

• Contents: Board
• Data Bus Width: 8 bit
• Silicon Manufacturer: Silicon Laboratories
• Core Architecture: 8051
• Silicon Family Name: C8051F00x
• Kit Contents: Board
• Features: JTAG Connector, Debug Adapter Interface, Analog I/O Configuration
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F005
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The Timer 2 overflow rate, when in Baud Rate Generator Mode and using an internal clock source, is determined
solely by the Timer 2 16-bit reload value (RCAP2H:RCAP2L). The Timer 2 clock source is fixed at SYSCLK/2.
The Timer 2 overflow rate can be calculated as follows:
Timer 2 can be selected as the baud rate generator for RX and/or TX by setting RCLK (T2CON.5) and/or TCLK
(T2CON.4), respectively. When either RCLK or TCLK is set to logic 1, Timer 2 interrupts are automatically
disabled and the timer is forced into Baud Rate Generator Mode with SYSCLK/2 as its clock source. If a different
timebase is required, setting the C/T2 bit (T2CON.1) to logic 1 will allow Timer 2 to be clocked from the external
input pin T2. See the Timers section for complete timer configuration details.
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C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Figure 18.5. UART Modes 1, 2, and 3 Interconnect Diagram
T2_OVERFLOWRATE = (SYSCLK/2) / (65536 – [RCAP2H:RCAP2L]).
RS-232
MCU
TX
RX
Rev. 1.7
RS-232
LEVEL
XLTR
OR
TX
RX
TX
RX
C8051Fxxx
C8051Fxxx