MPC8378E-MDS-PB Freescale Semiconductor, MPC8378E-MDS-PB Datasheet - Page 80

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MPC8378E-MDS-PB

Manufacturer Part Number
MPC8378E-MDS-PB
Description
BOARD PROCESSOR FOR MDS S
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8378E-MDS-PB

Contents
Board
For Use With/related Products
MPC8378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High-Speed Serial Interfaces (HSSI)
Figure 53
20 High-Speed Serial Interfaces (HSSI)
The MPC8378E features two serializer/deserializer (SerDes) interfaces to be used for high-speed serial
interconnect applications. See
This section describes the common portion of SerDes DC electrical specifications, which is the DC
requirement for SerDes reference clocks. The SerDes data lane’s transmitter and receiver reference circuits
are also shown.
20.1
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms
used in the description and specification of differential signals.
Figure 54
description. The figure shows waveform for either a transmitter output (SDn_TX and SDn_TX) or a
receiver input (SDn_RX and SDn_RX). Each signal swings between A volts and B volts where A > B.
Using this waveform, the definitions are as follows. To simplify illustration, the following definitions
assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling
environment.
80
Single-Ended Swing
The transmitter output signals and the receiver input signals SDn_TX, SDn_TX, SDn_RX and
SDn_RX each have a peak-to-peak swing of A
single-ended swing.
Differential Output Voltage, V
The differential output voltage (or swing) of the transmitter, V
the two complimentary output voltages: V
or negative.
Note: The clock edge is selectable on SPI.
SPICLK (output)
Signal Terms Definition
shows the SPI timing in master mode (internal clock).
Output Signals:
shows how the signals are defined. For illustration purpose, only one SerDes lane is used for
Input Signals:
(See Note)
(See Note)
SPIMISO
SPIMOSI
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
Figure 53. SPI AC Timing in Master Mode (Internal Clock) Diagram
Table 1
t
NIIVKH
for the interfaces supported.
OD
(or Differential Output Swing):
t
NIKHOV
t
NIIXKH
SDn_TX
B volts. This is also referred as each signal wire’s
V
SDn_TX
. The V
OD
, is defined as the difference of
OD
value can be either positive
Freescale Semiconductor

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