HW-AFX-FF1760-500-G Xilinx Inc, HW-AFX-FF1760-500-G Datasheet - Page 16

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HW-AFX-FF1760-500-G

Manufacturer Part Number
HW-AFX-FF1760-500-G
Description
BOARD DEV VIRTEX 5 FF1760
Manufacturer
Xilinx Inc
Type
FPGAr
Datasheet

Specifications of HW-AFX-FF1760-500-G

Contents
*
For Use With/related Products
Virtex™-5 LX FF1760
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
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Detailed Description
16
7. Prototyping Area
8. V
9. VBATT
CCO
6d. Downstream Interface Connector
-Enable Supply Jumpers
The downstream interface connector (P4) passes serial configuration information to the
DUT in the downstream prototype platform board
X-Ref Target - Figure 7
The prototyping area accommodates 0.10-inch spaced ICs. The kit contains headers that
can be soldered to the breakout area, if desired. Power and ground buses are located at the
top and bottom edges, respectively, of the prototyping area.
Virtex-5 FPGAs have 9 to 33 SelectIO banks (J44 and J45), labeled VCCO_0 to VCCO_34,
each with a V
each bank to one of the two onboard supplies, the V
must be installed for the Virtex-5 device to function normally.
An onboard battery holder (B1) is connected to the VBATT pin of the DUT. If an external
power supply is used, the associated jumper must be removed; instead, use a 12-mm
lithium coin battery (3V).
CCO
Figure 7: Downstream Interface Connector (44-Pin Male)
PROG
-enable supply jumper. The V
GND
GND
GND
GND
GND
GND
GND
GND
GND
INIT
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
www.xilinx.com
CCO
CCINT
(Figure
-enable supply jumpers can connect
Virtex-5 LX FPGA Prototype Platform
or V
7).
CCO
UG222 (v1.1) April 18, 2008
supplies. These jumpers
NC
CLK
DONE
NC
NC
NC
NC
NC
NC
NC
DOUT_BUSY
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
GND
UG222_07_051506
R

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