8.10.00 J-TRACE ARM Segger Microcontroller Systems, 8.10.00 J-TRACE ARM Datasheet - Page 156
![JTAG EMULATOR ARM7/ARM9 ETM](/photos/9/27/92738/8_10_00-j-trace-arm_sml.jpg)
8.10.00 J-TRACE ARM
Manufacturer Part Number
8.10.00 J-TRACE ARM
Description
JTAG EMULATOR ARM7/ARM9 ETM
Manufacturer
Segger Microcontroller Systems
Type
Emulatorr
Specifications of 8.10.00 J-TRACE ARM
Contents
Emulation Module
For Use With/related Products
ARM7, ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
899-1006
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7.2
7.2.1
7.2.1.1 Reset strategy
7.2.1.2 Memory mapping
J-Link / J-Trace (UM08001)
J-Link has been tested with the following ATMEL devices, but should work with any
ARM7/9 and Cortex-M3 device:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
If you experience problems with a particular device, do not hesitate to contact Seg-
ger.
All devices of this family are supported by J-Link.
The reset pin of the device is per default disabled. This means that the reset strate-
gies which rely on the reset pin (low pulse on reset) do not work per default. For this
reason a special reset strategy has been made available.
It is recommended to use this reset strategy. This special reset strategy resets the
peripherals by writing to the RSTC_CR register. Resetting the peripherals puts all
peripherals in the defined reset state. This includes memory mapping register, which
means that after reset flash is mapped to address 0. It is also possible to achieve the
same effect by writing 0x4 to the RSTC_CR register located at address 0xfffffd00.
This information is applicable to the following devices:
•
•
•
•
•
Either flash or RAM can be mapped to address 0. After reset flash is mapped to
address 0. In order to map RAM to address 0, a 1 can be written to the RSTC_CR reg-
ister. Unfortunately, this remap register is a toggle register, which switches between
RAM and flash with every time bit zero is written.
In order to achieve a defined mapping, there are two options:
1.
2.
ATMEL
AT91SAM7A3
AT91SAM7S32
AT91SAM7S321
AT91SAM7S64
AT91SAM7S128
AT91SAM7S256
AT91SAM7S512
AT91SAM7SE32
AT91SAM7SE256
AT91SAM7SE512
AT91SAM7X128
AT91SAM7X256
AT91SAM7X512
AT91SAM7XC128
AT91SAM7XC256
AT91SAM7XC512
AT91RM9200
AT91SAM9260
AT91SAM9261
AT91SAM9262
AT91SAM9263
AT91SAM7S (all devices)
AT91SAM7SE (all devices)
AT91SAM7X (all devices)
AT91SAM7XC (all devices)
AT91SAM7A (all devices)
Use the software reset described above.
Test if RAM is located at 0 using multiple read/write operations and testing the
AT91SAM7
CHAPTER 7
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
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