IPT-C2H-NIOS Altera, IPT-C2H-NIOS Datasheet - Page 44

• Manufacturer Part Number: IPT-C2H-NIOS
• Description: C2H COMPILER FOR NIOS II
• Manufacturer: Altera
• Series: Nios®IIr
• Type: Nios IIr

Specifications of IPT-C2H-NIOS

• Function: C to Hardware Compiler
• License: Initial License
• Software Application: IP CORE, NIOS Processor And Functions
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

One-to-One C-to-Hardware Mapping
3–4
Nios II C2H Compiler User Guide
Pipelined Operations and Assignments
The C2H Compiler always registers the results of the operators listed in
Table
amount of logic, which creates a significant propagation delay through
the circuit. Calculating these operations in series with other operations in
a single clock cycle would incur unacceptable propagation delays and
significantly reduce the maximum achievable clock frequency (f
the system. The C2H Compiler pipelines these operations by giving each
its own registered assignment. There are exceptions for cases in which an
operation reduces to trivial logic, as listed in
The general rule "one registered assignment for every = operator" can be
amended to read, "one registered assignment for every = operator or
complex arithmetic operator".
Table 3–3. Complex Arithmetic Operations Pipelined by the C2H Compiler
Operator
3–3. Some arithmetic operations, such as multiplication, use a large
>>
<<
*
/
%
Multiplication
Division
Modulus
Right bit-wise shift
Left bit-wise shift
Description
9.1
Either operand is a constant power of
Right-hand side is constant
2, which reduces to left-shift operation
Right-hand operand is a constant
power of 2, which reduces to a right-
shift operation
Right-hand operand is a constant
power of 2, which reduces to a
masking operation
Right-hand side is constant
Table 3–3
Exceptions
Altera Corporation
November 2009
MAX
) for