HSC-ADC-EVALA-DC Analog Devices Inc, HSC-ADC-EVALA-DC Datasheet - Page 36

KIT EVAL FOR DUAL ADC/CONV

HSC-ADC-EVALA-DC

Manufacturer Part Number
HSC-ADC-EVALA-DC
Description
KIT EVAL FOR DUAL ADC/CONV
Manufacturer
Analog Devices Inc
Datasheets

Specifications of HSC-ADC-EVALA-DC

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AN-905
In Figure 91, a Tone Generator generates a single sine wave at
70.3 MHz with a sample clock of 122.88 MSPS. This vector is
sent to the AD9246 ADIsimADC converter model where it is
digitized and converted to bits. The Input Formatter then
converts this digitized data into the normalized format proc-
essed by most of the blocks within VisualAnalog. The FFT
component calculates the FFT of this data and the FFT Analysis
component performs an analysis on the data. The resulting
data appears on the graph along with the analysis results.
Figure 91. ADIsimADC Model File
Rev. 0 | Page 36 of 40
A variation of this template can be used for testing converters
with complex inputs. Because data is easily loaded from a file,
the model can easily be stimulated with complex waveforms
loaded from a file. This is useful for studying the behavior of
the ADC when stimulated from complex data.
.

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