ST92F150-EVAL STMicroelectronics, ST92F150-EVAL Datasheet - Page 390

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ST92F150-EVAL

Manufacturer Part Number
ST92F150-EVAL
Description
BOARD EVALUATION FOR ST9 SERIES
Manufacturer
STMicroelectronics
Datasheets

Specifications of ST92F150-EVAL

Processor To Be Evaluated
ST90158 and ST92F1x Daughter Board
Interface Type
I2C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2905

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ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS
WATCHDOG TIMING TABLE
(V
unless otherwise specified)
Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,
watchdog prescaler and counter programmed values.
The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz, with minimum and
maximum prescaler value and minimum and maximum counter value.
Measurement points are V
Legend:
Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;
Psc = Watchdog Prescaler Register content (WDTPR): from 0 to 255
Cnt = Watchdog Couter Registers content (WDTRH,WDTRL): from 0 to 65535
T
WATCHDOG TIMING
390/429
1
WDIN
1
2
3
4
DD
= Watchdog Input signal period (WDIN), T
= 5V ± 10%, T
TwWDOL
TwWDOH
TwWDIL
TwWDIH
Symbol
2 x Crystal Oscillator Clock period when CLOCK1 is divided by 2;
Crystal Oscillator Clock period x PLL factor when the PLL is enabled.
WDOUT Low Pulse Width
WDOUT High Pulse Width
WDIN High Pulse Width
WDIN Low Pulse Width
A
OH
=
or V
40°C to +125°C, C
IH
for positive pulses and V
Parameter
WDIN
≥ 8 x Tck
Load
OL
= 50pF, f
or V
IL
4 x (Psc+1) x (Cnt+1) x Tck
4 x (Psc+1) x (Cnt+1) x Tck
(Psc+1) x (Cnt+1) x T
(Psc+1) x (Cnt+1) x T
for negative pulses.
INTCLK
Formula
≥ 4 x Tck
≥ 4 x Tck
= 24MHz, Push-pull output configuration,
Value
WDIN
WDIN
Min
167
333
167
333
167
167
Max
2.8
2.8
Unit
ns
ns
ns
ns
ns
ns
s
s

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