ST92F150-EVAL STMicroelectronics, ST92F150-EVAL Datasheet - Page 395
ST92F150-EVAL
Manufacturer Part Number
ST92F150-EVAL
Description
BOARD EVALUATION FOR ST9 SERIES
Manufacturer
STMicroelectronics
Specifications of ST92F150-EVAL
Processor To Be Evaluated
ST90158 and ST92F1x Daughter Board
Interface Type
I2C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2905
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SPI TIMING TABLE
(V
Note:
Measurement points are V
(1) Values guaranteed by design.
Legend:
Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;
N° Symbol
10
11
12
13
1
2
3
4
5
6
7
8
9
DD
= 5V ± 10%, T
t
t
t
SPI_H
SPI_L
t
t
f
t
t
t
Lead
t
t
Hold
Rise
Lag
SPI
SPI
Fall
SU
t
t
Dis
t
H
A
V
SPI frequency
SPI clock period
Enable lead time
Enable lag time
Clock (SCK) high time
Clock (SCK) low time
Data set-up time
Data hold time (inputs)
Access time (time to data active
from high impedance state)
Disable time (hold time to high im-
pedance state)
Data valid
Data hold time (outputs)
Rise time
(20% V
Fall time
(70% V
2 x Crystal Oscillator Clock period when CLOCK1 is divided by 2;
Crystal Oscillator Clock period x PLL factor when the PLL is enabled.
A
OL
DD
DD
=
, V
to 70% V
to 20% V
–
OH
Parameter
40°C to +125°C, C
, V
IL
and V
DD
DD
, C
, C
IH
L
L
in the SPI Timing Diagram.
ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS
= 200pF)
= 200pF)
Load
Master
Slave
Master
Slave
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Slave
Master (before capture edge)
Slave (after enable edge)
Master (before capture edge)
Slave (after enable edge)
Outputs: SCK,MOSI,MISO
Inputs: SCK,MOSI,MISO,SS
Outputs: SCK,MOSI,MISO
Inputs: SCK,MOSI,MISO,SS
= 50pF, f
Condition
INTCLK
= 24MHz, unless otherwise specified)
f
INTCLK
4 x Tck
2 x Tck
Tck / 4
Tck / 4
Min
40
40
80
90
80
90
40
40
40
40
0
0
0
/ 128
Value
(1)
f
f
INTCLK
INTCLK
Max
120
240
120
100
100
100
100
/ 4
/ 2
395/429
MHz
Unit
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
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