KS8721SL-EVAL Micrel Inc, KS8721SL-EVAL Datasheet - Page 27

• Manufacturer Part Number: KS8721SL-EVAL
• Description: BOARD EVAL EXPERIMENT KS8721SL
• Manufacturer: Micrel Inc

Specifications of KS8721SL-EVAL

• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: No
• Utilized Ic / Part: KSZ8721SL
• Primary Attributes: 1 Port, 100BASE-TX/100BASE-FX/10BASE-T
• Secondary Attributes: MII, RMII, Auto MDI, MDIX, >130 Meter Cable Driver, LDO, IEEE802.3u Compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 576-1010

KS8721BL/SL (3.3V Single Power Supply 10/100BaseTX/FX MII Physical Layer Transceiver)
Receive Data [1:0] (RXD[1:0])
RXD[1:0] shall transition synchronously to REF_CLK. For each clock period
in which CRS_DV is asserted, RXD[1:0] transfers two bits of recovered data
from the PHY. In some cases (e.g. before data recovery or during error
conditions) a pre-determined value for RXD[1:0] is transferred instead of
recovered data. RXD[1:0] shall be "00" to indicate idle when CRS_DV is de-
asserted. Values of RXD[1:0] other than "00" when CRS_DV is de-asserted
are reserved for out-of-band signaling (to be defined). Values other than
"00" on RXD[1:0] while CRS_DV is de-asserted shall be ignored by the
MAC/repeater. Upon assertion of CRS_DV, the PHY shall ensure that
RXD[1:0]=00 until proper receive decoding takes place.
Transmit Enable (TX_EN)
Transmit Enable TX_EN indicates that the MAC is presenting di-bits on
TXD[1:0] on the RMII for trans-mission. TX_EN shall be asserted
synchronously with the first nibble of the preamble and shall remain
asserted while all di-bits to be transmitted are presented to the RMII.
TX_EN shall be negated prior to the first REF_CLK following the final di-bit
of a frame. TX_EN shall transition synchronously with respect to REF_CLK.
Transmit Data [1:0] (TXD[1:0])
Transmit Data TXD[1:0] shall transition synchronously with respect to
REF_CLK. When TX_EN is asserted, TXD[1:0] are accepted for transmission
by the PHY. TXD[1:0] shall be "00" to indicate idle when TX_EN is de-
asserted. Values of TXD[1:0] other than "00" when TX_EN is de-asserted
are reserved for out-of-band signaling (to be defined). Values other than
"00" on TXD[1:0] while TX_EN is disserted shall be ignored by the PHY.
Collision Detection
Since the definition of CRS_DV and TX_EN both contain an accurate
indication of the start of frame, the MAC can reliably regenerate the COL
signal of the MII by Ending TX_EN and CRS_DV.
During the IPG time following the successful transmission of a frame, the
COL signal is asserted by some transceivers as a self-test. The Signal
Quality Error (SQE) function will not be supported by the reduced MII due
to the lack of the COL signal. Historically, SQE was present to indicate that
a transceiver located physically remote from the MAC was functioning. Since
the reduced MII only supports chip-to-chip connections on a PCB, SQE
functionality is not required.
Aug, 2003
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KS8721BL/SL Preliminary Rev 0.90