COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 80
COP8SA-DM
Manufacturer Part Number
COP8SA-DM
Description
MODULE DEBUGGING FOR COP8SA
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of COP8SA-DM
Module/board Type
Debugger Module
For Use With/related Products
Cop 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*COP8SA-DM
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Software Trap routine is interrupted by another Software Trap, the RPND instruction in
the service routine for the second Software Trap will reset the STPND flag; upon return
to the first Software Trap routine, the STPND flag will have the wrong state. This will
allow maskable interrupts to be acknowledged during the servicing of the first Software
Trap. To avoid problems such as this, the user program should contain the Software Trap
routine to perform a recovery procedure rather than a return to normal execution.
Under normal conditions, the STPND flag is reset by a RPND instruction in the Software
Trap service routine. If a programming error or hardware condition (brownout, power
supply glitch, etc.) sets the STPND flag without providing a way for it to be cleared, all
other interrupts will be locked out. To alleviate this condition, the user can use extra
RPND instructions in the main program and in the Watchdog service routine (if present).
There is no harm in executing extra RPND instructions in these parts of the program.
2.13.5 Port L Interrupts
Port L provides the user with an additional eight fully selectable, edge sensitive
interrupts which are all vectored into the same service subroutine.
The interrupt from Port L shares logic with the wake up circuitry. The register WKEN
allows interrupts from Port L to be individually enabled or disabled. The register
WKEDG specifies the trigger condition to be either a positive or a negative edge. Finally,
the register WKPND latches in the pending trigger conditions.
The GIE (Global Interrupt Enable) bit enables the interrupt function.
A control flag, LPEN, functions as a global interrupt enable for Port L interrupts. Setting
the LPEN flag will enable interrupts and vice versa. A separate global pending flag is not
needed since the register WKPND is adequate.
Since Port L is also used for waking the device out of the HALT or IDLE modes, the user
can elect to exit the HALT or IDLE modes either with or without the interrupt enabled.
If he elects to disable the interrupt, then the device will restart execution from the
instruction immediately following the instruction that placed the microcontroller in the
HALT or IDLE modes. In the other case, the device will first execute the interrupt service
routine and then revert to normal operation. (See HALT MODE for clock option wakeup
information.)
2.13.6 Interrupt Summary
The device uses the following types of interrupts, listed below in order of priority:
2-42
COP8SAx7 MICROCONTROLLER
1. The Software Trap non-maskable interrupt, triggered by the INTR (00 op-
2. Maskable interrupts, triggered by an on-chip peripheral block or an external
code) instruction. The Software Trap is acknowledged immediately. This in-
terrupt service routine can be interrupted only by another Software Trap.
The Software Trap should end with two RPND instructions followed by a re-
start procedure.
device connected to the device. Under ordinary conditions, a maskable inter-
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