M5249C3 Freescale Semiconductor, M5249C3 Datasheet
M5249C3
Specifications of M5249C3
Related parts for M5249C3
M5249C3 Summary of contents
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... SRAM with external access only for data input and output. The SCF5249 is also an excellent general purpose system controller with over 125 Dhrystone 2.1 MIPS @ 140MHz performance at a very competitive price. The © Freescale Semiconductor, Inc., 2004. All rights reserved. Document Number: SCF5249EC Rev. 0, 04/2005 Table of Contents 1 Introduction ...
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... Package Type Temperature Range 144 pin QFP -20°C to 70°C 144 pin QFP -20°C to 70°C 160 ball MAPBGA -20°C to 70°C 160 ball MAPBGA -20°C to 70°C Part Status Leaded Lead Free Leaded Lead Free ® processor core operating at Freescale Semiconductor ...
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... Supervisor/user modes for system protection — Vector base register to relocate exception-vector table — Optimized for high-level language constructs SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor ColdFire V2 8K byte I Addr Gen I-Cache ...
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... IEC958 input and output — Four serial Philips IIS/Sony EIAJ interfaces – One with input and output, one with output only, two with input only (Three inputs, two outputs) – Master and Slave operation SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Freescale Semiconductor ...
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... C Interfaces — Interchip bus interface for EEPROMs, LCD controllers, A/D converters, keypads — Master and slave modes, support for multiple masters — Automatic interrupt generation with programmable level SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor SCF5249 Feature Details 5 ...
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... MAPBGA Ball Assignments The following signals are not available on the 144 QFP package. The 144 QFP part is qualified for 120 MHz operation. The 160MAPBGA part is qualified for 140 MHz. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev NOTE Freescale Semiconductor ...
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... The SCF5249 provides four fully programmable DMA channels for quick data transfer. Single and dual address mode is supported with the ability to program bursting and cycle stealing. Data transfer is selectable as 8, 16, 32, or 128-bits. Packing and unpacking is supported. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Table 2. 160 MAPBGA Ball Assignments Function cmd_sdio2 ...
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... The SCF5249 provides a glueless interface to 16-bit port size SRAM, ROM, and peripheral devices with independent programmable control of the assertion and negation of chip-select and write-enable signals. The SCF5249 also supports bursting ROMs. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Freescale Semiconductor ...
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... The audio bus can also be used for audio format conversion. 5.12 CD-ROM Encoder/Decoder The SCF5249 is capable of processing CD-ROM sectors in hardware. Processing is compliant with CD-ROM and CD-ROM XA standards. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor SCF5249 Functional Overview 9 ...
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... The timer unit has an 8-bit prescaler that allows programming of the clock input frequency, which is derived from the system clock. In addition to the ÷1 and ÷16 clock derived from the bus clock (CPU clock / 2), the programmable timer-output pins either generate an active-low pulse or toggle the outputs. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Freescale Semiconductor ...
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... In addition, there are 8 GPIOs where interrupts can be generated on the rising or falling edge of the pin. All interrupts are autovectored and interrupt levels are programmable. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor SCF5249 Functional Overview 2 C bus standard bidirectional ...
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... Documentation is available from a local Freescale distributor, a Freescale semiconductor sales office, a Freescale Literature Distribution Center, or through the Freescale DSP home page on the internet; http://www.freescale.com/ (the source for the latest information). SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Freescale Semiconductor ...
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... SDRAM chip selects SDRAMCS2/GPIO7 SDRAM clock enable BCLKE System clock SCLK/GPIO10 SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Table 3. SCF5249 Documentation Description ColdFire Family Programmer’s Reference Manual Version 2/2M ColdFire Core Processor User’s Manual Version 2/2M ColdFire Core Processor User’ ...
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... Capable of output waveform or pulse generation Input/ Function Output In/Out In/Out In/Out Out negated In/Out In/Out In/Out In/Out 2 C module In/Out 2 C module In/Out C module In/Out 2 C In/Out 2 In Out asserted Out negated In In In/Out Out Freescale Semiconductor Reset State ...
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... SCLKOUT/GPIO15 SDATA0_SDIO1/GPIO54 SDATA1_BS1/GPIO9 RSTO/SDATA2_BS2 SDATA3/GPIO56 SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Table 4. SCF5249 Signal Index (continued) Mnemonic Audio interfaces IEC958 inputs multiplexed with some A/D inputs Audio interfaces IEC958 outputs Audio interfaces serial data inputs Audio interfaces serial data outputs ...
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... JTAG mode and a hardware break-point in debug mode. Multiplexed serial input for the JTAG or background debug module. Multiplexed serial output for the JTAG or background debug module. Input/ Function Output In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out Out Out Freescale Semiconductor Reset State Hi-Z Hi-Z ...
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... DRAM bank match the address decode. All 16 bits of the data bus are driven during writes, regardless of port width or operand size. 8.3.5 Transfer Acknowledge The TA/GPIO20 pin is the transfer acknowledge signal. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Signal Descriptions 17 ...
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... SDUDQM and SDLDQM byte enable outputs. The DRAM clock is driven by the SCLK signal The BCLKE active high output signal is used during synchronous mode to route directly to the SCKE signal of external SDRAMs. This signal provides the clock enable to the SDRAM. NOTE Freescale Semiconductor ...
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... All serial module signals can be used as gpi or gpo. The GPIO-FUNCTION and GPIO1-FUNCTION registers must be programmed to determine pin functions of the inputs and outputs. If used as gpo or gpi, UART functionality is lost. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor NOTE 2 Table Module Signals ...
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... Users can program the TIN0/GPI33 and TIN1/GPIO23 inputs as clocks that cause events in the counter and prescalars. They can also cause capture on the rising edge, falling edge, or both edges. The TOUT0/GPO33 and TOUT1/ADOUT/GPO35 programmable outputs pulse or toggle on various timer events. NOTE Freescale Semiconductor ...
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... Serial Audio Data Out Serial audio error flag Serial audio CFLG SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Table 9. Serial Audio Interface Signals The SCLK1, SCLK2/GPIO48 and SCLK3/GPIO49, and SCLK4/GPIO50 multiplexed pins can serve as general purpose I/Os or serial audio bit clocks. As bit clocks, these bidirectional pins can be programmed as outputs to drive their associated serial audio (IIS) bit clocks ...
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... Subcode clock input. When pin is used as subcode clock, this pin is driven by the CD channel encoder. Subcode sync output This signal is driven high if a subcode sync needs to be inserted in the EFM stream. Subcode data output This signal is a subcode data out pin. NOTE Description Description Freescale Semiconductor ...
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... SDATA3/GPIO57 The SDATA0_SDIO1 and RSTO/SDATA2_BS2 signals are only used in the 160 MAPBGA package. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Table 12. Flash Memory Card Signals Clock out for both MemoryStick interfaces and for SecureDigital Secure Digital command line ...
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... SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Description Multiplexed signal IIC interface clock or QSPI clock output Function select is done via PLLCR register. Multiplexed signal IIC interface data or QSPI data input. Function select is done via PLLCR register. QSPI data output 4 different QSPI chip selects NOTE Freescale Semiconductor ...
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... Debug Data The debug data pins, DDATA0_GPIO0, DDATA1_GPIO1, DDATA2_GPIO2, and DDATA3_GPIO4, are four bits wide. This nibble-wide bus displays captured processor data and break-point status. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor NOTE Signal Descriptions 25 ...
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... Reserved Begin execution of RTE instruction Begin 1-byte data transfer on DDATA Begin 2-byte data transfer on DDATA Begin 3-byte data transfer on DDATA Begin 4-byte data transfer on DDATA 2 Exception processing Emulator mode entry exception processing Processor is stopped, waiting for interrupt 2 Processor is halted Freescale Semiconductor ...
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... The TDO/DSO is a dual-function pin. When TEST[3:0] = 0001, then DSO is selected. When TEST[3:0] = 0000, TDO is selected. When used as TDO, this output signal provides the serial data port for outputting SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Signal Descriptions 27 ...
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... SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Table 15. Maximum Ratings Symbol stg Table 16. Operating Temperature Symbol T Amax T Amin Value Units -0.5 to +2.5 V +1.98 V +1.62 V -0.5 to +4.6 V +3.6 V +3.0 V -0 -65 to150 C Value Units ο ° C. Freescale Semiconductor ...
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... SCL, SDA, PST[3:0], DDATA[3:0], TDSO, SDRAS, SDCAS, SDWE, SDRAMCS[2:1], SDLDQM, SDUDQM, R/W 3. TOUT[1:0], RTS[2:0], TXD[2:1], SCLK[4:1] 4. BKPT/TMS, DSI/TDI, DSCLK/TRST 5. Capacitance C is periodically sampled rather than 100% tested SCLK[4:1], SCL, SCL2, SDA, SDA2, CRIN, RSTI SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Symbol 4mA , 2mA 1 2 ...
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... The PLL core supplies (PLLGVdd and PLLCVdd) should comply with these constraints just as the CoreVdd does. In practice, PLLGVdd and PLLCVdd are typically connected directly to the CoreVdd with some filtering. Further, the PLL PAD supply (PLL1VDD) would be connected directly to the PAD supply via some filtering. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Freescale Semiconductor ...
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... Core supply and the PAD supply during power-down. Refer to the M5249C3 Reference Board Userís Manual for the recommended diode types. A further note is the recommendation for hard resetting of the device. Freescale recommends using a dynamic reset circuit ...
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... EBUOUT2 BUFENB2 SUBR SFSY RCK SRE LRCK3 SWE SCLK3 Table 19. Clock Timing Specification Characteristic Min 1 11.29 14.2 GPIO GPIO24 GPIO22 GPIO7 GPO37 GPIO17 GPIO53 GPIO52 GPIO51 GPIO11 GPIO45 GPIO12 GPIO49 Units Max 33.86 MHz 7.1 — nSec — nSec Freescale Semiconductor ...
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... Table 20. External Bus Input Timing Specifications Num B0 SCLK B1 Control input valid to SCLK high B2 SCLK high to control inputs valid B4 Data input (D[31:0]) valid to SCLK high SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Figure 5. Clock Timing Definition NOTE NOTE a Characteristic Symbol tCYC ...
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... TA pin is being referred to as control input. 9.1.2 Processor Bus Output Timing Specifications Table 21 lists processor bus output timings. Table 21. External Bus Output Timing Specifications SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Characteristic Symbol tCHDII Units Min Max 2 — ns Freescale Semiconductor ...
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... Figure 6. Read/Write (Internally Terminated) Timing SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Figure 7. Read Bus Cycle Terminated by TA Electrical Characteristics 35 ...
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... Electrical Characteristics SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Table 22. SDRAM Timing Figure 8. SDRAM Read Cycle Freescale Semiconductor ...
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... AC timing specs assume 50pF load capacitance on PSTCLK and output pins. If this value is different, the input and output timing specifications would need to be adjusted to match the clock load. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Figure 9. SDRAM Write Cycle Table 23. Debug AC Timing Specification Characteristic ...
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... SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Figure 10. Debug Timing Definition Characteristic Units Min Max tbd — bus clocks tbd — nSec tbd — nSec — tbd nSec tbd — nSec tbd — bus clocks tbd — bus clocks Freescale Semiconductor ...
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... SCLK to CTS Invalid (input hold) U5 SCLK to TXD Valid (output valid) U6 SCLK to TXD Invalid (output hold) U7 SCLK to RTS Valid (output valid) U8 SCLK to RTS Invalid (output hold) SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Figure 11. Timer Module Timing Definition Characteristic Electrical Characteristics T7 T5 ...
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... CTS U5 TXD U7 RTS Figure 12. UART Timing Definition Characteristic Units Min Max tbd — bus clocks tbd — bus clocks — tbd mSec tbd — nSec — tbd mSec tbd — bus clocks tbd — nSec tbd — bus clocks Freescale Semiconductor ...
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... Since SCL and SDA are open-collector-type outputs, which the processor can only actively drive low, the time required for SCL or SDA to reach a high level depends on external signal capacitance and pull-up resistor values. 3. Specified at a nominal 20 pF load. M2 SCL M1 SDA SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Characteristic Characteristic = 2 0 Figure 13 ...
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... Table 28. I2C Output Bus Timings Characteristic M10 SCLK M11 M12 2 C and System Clock Timing Relationship Characteristic Min Units Min Max tbd — nSec tbd — nSec — tbd nSec tbd — nSec M13 Units Max tbd — nSec tbd — nSec Freescale Semiconductor ...
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... TDI, TMS to TCK rising (Input Setup) J5 TCK rising to TDI, TMS Invalid (Hold) J6 Boundary Scan Data Valid to TCK (Setup) J7 TCK to Boundary Scan Data Invalid to rising edge (Hold) SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Characteristic SCLK GPIO IN P2 GPIO OUT P4 Characteristic =0 ...
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... TDO BOUNDARY SCAN DATA OUTPUT SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Characteristic J1 J2A J2B J11 Figure 16. JTAG Timing Units Min Max 12 — nSec — 15 nSec — 15 nSec — tbd nSec — tbd nSec J3A J3B J8 J10 J12 Freescale Semiconductor ...
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... Table 32. SCLK OUTPUT, SDATA0 OUTPUT Timing Specifications Name TU SCLK fall to SDATAO rise TD SCLK fall to SDATAO fall SCLK (OUTPUT) SDATAO1, 2 (OUTPUT) Figure 18. SCLK Output, SDATAO Output Timing Diagram SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Characteristic Min TU Characteristic Min TU Electrical Characteristics Unit Max --- ...
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... SDRAM address / static adr A11 O SDRAM address / static adr A10 O SDRAM address / static adr A9 O SDRAM address / static adr A18 O SDRAM address / static adr A17 O SDRAM address / static adr BCLK/GPIO10 I/O sdram clock output Unit Min Max -5 — — Description Freescale Semiconductor ...
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... BUFENB1/GPIO57 SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Name Type I/O MemoryStick/SD BCLKE O sdram clock enable output SDA/QSPI_DIN I/O IIC data/QSPI data in function select is PLLCR(11) DATA24 I/O data A22 O SDRAM address / static adr SDUDQM O SDRAM UDQM EF/GPIO19 I/O ...
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... QSPI chip select 2 DATA20 I/O data DATA22 I/O data DATA18 I/O data DATA23 I/O data DATA17 I/O data PADD-VDD PAD-VDD DATA16 I/O data CFLG/GPIO18 I/O CFLG input O audio interfaces EBU out 1 CORE-GND CORE-GND I audio interfaces EBU convertor input0 Description Freescale Semiconductor ...
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... SDATAO1/GPIO25 SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Name Type EBUIN2/GPI37 I audio interfaces EBU in 2 CORE-VDD CORE-VDD SCL2/GPIO3 I/O IIS2 clock line RSTI I Reset O timer output output LRCK2/GPIO44 O audio interfaces EBU out Output Enable SDA2/GPIO55 I/O IIS2 data ...
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... CORE-GND TCK I JTAG PAD-GND PAD-GND PST3/GPIO62 I/O debug O debug PST1/GPIO60 I/O debug PAD-VDD PAD-VDD PST2/GPIO61 I/O debug PST0/GPIO59 I/O debug TDI/DSI I jtag/debug TEST0 I test TIN0/GPI33 I timer input 0 HI-Z I jtag DDATA3/GPIO4 I/O debug TOUT0/GPO33 O timer output 0 DDATA1/GPIO1 I/O debug Description Freescale Semiconductor ...
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... SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Freescale Semiconductor Name Type DDATA2/GPIO2 I/O debug I second UART clear / AD input 3 DDATA0/GPIO0 I/O debug I second UART receive data input / AD input 2 ...
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... Number 141 142 143 144 10.2 Package The SCF5249 is assembled in 144-pin QFP package. Thermal characteristics are not available at this time. SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev Name Type CORE-VDD CORE-VDD A12 O address TEST1 I test PAD-VDD PAD-VDD Description Freescale Semiconductor ...
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