HS2556EPI61H Renesas Electronics America, HS2556EPI61H Datasheet - Page 197

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HS2556EPI61H

Manufacturer Part Number
HS2556EPI61H
Description
EMULATOR BASE H8SX/2556
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HS2556EPI61H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
7.2 User System Interface
All user system interface signals are directly connected to the MCU in the emulator with no buffering except for
those listed below which are connected to the MCU through control circuits:
• NMI
• RESET
• MD2, MD1, MD0
• XTAL
• EXTAL
• WAIT
7.2.1
All user system interface signals are protected from over- or under-voltage by use of diode arrays except for the
AVcc and Vref.
Pull-up resistors are connected to the port signals except for the analog port signals.
The P1Vcc signals (except for AVcc signals) at the head of the user system interface cable are connected
together, which is monitored by the emulator to detect whether the user system hardware is connected.
7.2.2
The interface circuit between the MCU in the emulator and the user system has a signal delay of about 8 ns due
to the user system interface cable and it includes pull-up resistors. Therefore, high-impedance signals will be
pulled up to the high level. When connecting the emulator to a user system, adjust the user system hardware to
compensate for propagation delays.
Default:
Mode Pins (MD2, MD1, and MD0): The mode pins are only monitored. The CPU mode depends on the High-
performance Embedded Workshop settings.
Signal Protection
User System Interface Circuits (HS2556EPI61H)
Figure 7.2 User System Interface Circuit for Mode Pins
Figure 7.1 Default User System Interface Circuit
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