HS7727KCI02H Renesas Electronics America, HS7727KCI02H Datasheet - Page 20

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HS7727KCI02H

Manufacturer Part Number
HS7727KCI02H
Description
ON CHIP DEBUG EMULATOR W/TRACE
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7727KCI02H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
9. Cache Operation during User Program Break
10. UBC
11. MFI Boot Mode
12. Memory Access during Break
13. Loading Sessions
14. [IO] window
14
When cache is enabled, the emulator accesses the memory by the following methods:
Therefore, when memory read or write is performed during user program break, the cache state
will be changed.
When [User] is specified in the [UBC mode] list box in the [Configuration] dialog box, the
UBC can be used in the user program.
Do not use the UBC in the user program as it is used by the E10A emulator when [EML] is
specified in the [UBC mode] list box in the [Configuration] dialog box.
When the MFI boot mode is used, be sure to allocate the boot program from the top of
MFRAM.
In the enabled MMU, when a memory is accessed and a TLB error occurs during break, it can
be selected whether the TLB exception is controlled or the program jumps to the user
exception handler in [TLB Mode] in the [Configuration] dialog box. When [TLB miss
exception is enable] is selected, a Communication Timeout error will occur if the TLB
exception handler does not operate correctly. When [TLB miss exception is disable] is
selected, the program does not jump to the TLB exception handler even if a TLB exception
occurs. Therefore, if the TLB exception handler does not operate correctly, a Communication
Timeout error will not occur but the memory contents may not be correctly displayed.
Information in [JTAG clock] of the [Configuration] dialog box cannot be recovered by loading
sessions. Thus the TCK value will be as follows:
At memory write: Writes through the cache, then writes to the memory.
At memory read: Does not change the cache write mode that has been set.
When HS7727KCI01H or HS7727KCI02H is used: TCK = 4.125 MHz
When HS7727KCM01H or HS7727KCM02H is used: TCK = 3.75 MHz
Display and modification
Do not change values of the User Break Controller because it is used by the emulator.
For each watchdog timer register, there are two registers to be separately used for write and
read operations.

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