SI3210DCQ1-EVB Silicon Laboratories Inc, SI3210DCQ1-EVB Datasheet - Page 38

• Manufacturer Part Number: SI3210DCQ1-EVB
• Description: DAUGHTERCARD W/SI3201 INTERFACE
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r
• Type: SLIC/CODECr

Specifications of SI3210DCQ1-EVB

• Contents: Evaluation Board and CD-ROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Si3210
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si3210/Si3211
2.4.3. Trapezoidal Ringing
In addition to the sinusoidal ringing waveform, the
ProSLIC
illustrates a trapezoidal ringing waveform with offset
V
To configure the ProSLIC for trapezoidal ringing, the
user should follow the same basic procedure as in the
Sinusoidal Ringing section, but using the following
equations:
RCO is a value which is added or subtracted from the
waveform to ramp the signal up or down in a linear
fashion. This value is a function of rise time, period, and
amplitude, where rise time and period are related
through the following equation for the crest factor of a
trapezoidal waveform.
where T = ringing period, and CF = desired crest factor.
For example, to generate a 71 V
signal, the equations are as follows:
For a crest factor of 1.3 and a period of 0.05 seconds
38
ROFF
RNGY 20 Hz
Figure 22. Trapezoidal Ringing Waveform
.
RNGX 71 V
V
TIP-RING
V
(
supports
ROFF
(
RNGX
RNGY
)
PK
RCO
t
=
RISE
1
-- -
2
)
=
t
×
=
=
RISE
trapezoidal
Desired V
-----------------------------------
--------------- -
20 Hz
=
=
1
-- -
2
71
----- -
96
×
3
-- - T 1
4
1
-------------------------------- -
t
RISE
96 V
2 RNGX
×
Period
T=1/freq


2
×
×
15
×
–
8000
=
---------- -
CF
PK
8000
24235
1
×
×
2
ringing.
8000


=
PK
(
2
200
15
, 20 Hz ringing
=
)
5EABh
=
time
C8h
Figure 22
Rev. 1.42
(20 Hz), the rise time requirement is 0.0153 seconds.
In addition, the user must select the trapezoidal ringing
waveform by writing TSWS = 1 in direct Register 34.
2.4.4. Ringing DC voltage Offset
A dc offset can be added to the ac ringing waveform by
defining
Register 19). The offset, V
signal when RVO is set to 1 (direct Register 34, bit 1).
The value of ROFF is calculated as follows:
2.4.5. Linefeed Considerations During Ringing
Care must be taken to keep the generated ringing signal
within the ringing voltage rails (GNDA and V
maintains proper biasing of the external bipolar
transistors. If the ringing signal nears the rails, a
distorted ringing signal and excessive power dissipation
in the external transistors will result.
To prevent this invalid operation, set the VBATH value
(direct Register 74) to a value higher than the maximum
peak ringing voltage. The discussion below outlines the
considerations and equations that govern the selection
of the VBATH setting for a particular desired peak
ringing voltage.
First, the required amount of ringing overhead voltage,
V
current through the load, I
gain of Q5 and Q6, and a reasonable voltage required
to keep Q5 and Q6 out of saturation. For ringing signals
up to V
However, to determine V
equations below.
where:
N
I
(max value = 2 mA), and
V
It is good practice to provide a buffer of a few more
milliamperes for I
leakages, etc. The total I
smaller than 80 mA.
OS
AC,PK
OVR
REN
is the offset current flowing in the line driver circuit
I
LOAD , PK
, is calculated based on the maximum value of
is the ringing REN load (max value = 5),
= amplitude of the ac ringing waveform.
PK
the
RCO 20 Hz, 1.3 crest factor
=
= 87 V, V
=
------------------------------------- -
0.0153 8000
V
------------------ -
R
offset
(
2
AC , PK
LOAD
ROFF
LOAD,PK
×
24235
×
+
OVR
=
voltage
OVR
I
OS
LOAD,PK
V
----------------- -
ROFF
to account for possible line
= 7.5 V is a safe value.
LOAD,PK
=
ROFF
96
=
for a specific case, use the
396
V
, is added to the ringing
AC , PK
×
=
, the minimum current
in
2
018Ch
15
current should be
×
ROFF
)
----------------- -
6.9 kΩ
N
REN
+
(indirect
I
BAT
OS
) to