KIT33999EKEVB Freescale Semiconductor, KIT33999EKEVB Datasheet - Page 12

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KIT33999EKEVB

Manufacturer Part Number
KIT33999EKEVB
Description
KIT EVAL 33999 16OUTPUT SW W/SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KIT33999EKEVB

Main Purpose
Power Management, Low Side Driver (Internal FET)
Embedded
No
Utilized Ic / Part
MC33999
Primary Attributes
16 Outputs, 5 ~ 27V, 900mA, SPI Interface, PWM Interface
Secondary Attributes
0.55 Ohm RdsON, Temperature, Over Voltage, Short Circuit Protection
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MCU INTERFACE DESCRIPTION
switch serving as a microcontroller unit (MCU) bus expander
and buffer with fault management and fault reporting
features. In doing so, the device directly relieves the MCU of
the fault management functions.
system clock serial frequencies up to 6.0 MHz using a Serial
Peripheral Interface (SPI) for control and diagnostic readout.
MCU and one 33999.
levels and incorporate positive logic. An input programmed to
a logic low state (< 0.8 V) has the corresponding output OFF.
Conversely, an input programmed to a logic high state
(> 2.2 V) has the output being controlled ON. Diagnostics is
treated in a similar manner—outputs with a fault will feed
back (via SO) to the microcontroller a logic [1], while normal
operating outputs will provide a logic [0].
using a daisy chain configuration or in parallel mode.
Figure 10
12
33999
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
In operation the 33999 functions as a 16-output serial
The 33999 directly interfaces to an MCU, operating at
Figure 9
All inputs are compatible with 3.3 V/ 5.0 V CMOS logic
The 33999 may be controlled and provide diagnostics
Microcontroller
Figure 9. 33999 SPI Interface with Microcontroller
MC68HCXX
Shift Register
Receive
Parallel
Buffer
Ports
shows the daisy chain configuration using the
illustrates the basic SPI configuration between an
MISO
MOSI
SCLK
PWM
RST
CS
SO
SI
24-Bit Shift Register
FUNCTIONAL DEVICE OPERATION
To Logic
33999
OPERATIONAL MODES
33999. Data from the MCU is clocked daisy chain through
each device while the Chip Select bit (
by the MCU. During each clock cycle, output status from the
daisy-chained 33999s is being transferred back to the MCU
via the Master In Slave Out (MISO) line. On rising edge of
data stored in the input register is then transferred to the
output driver. Daisy chain control of the 33999 requires
24 bits per device.
fashion using the SPI.
potentially 32 loads being controlled by two dedicated
parallel MCU ports used for chip select.
Multiple 33999 devices can be controlled in a parallel input
Microcontroller
MC68HCXX
Shift Register
Parallel
Figure 10. 33999 SPI System Daisy Chain
Ports
PWM2
MOSI
MISO
SCLK
PWM1
Analog Integrated Circuit Device Data
Figure
11, page 13, illustrates
Freescale Semiconductor
CS
SI
SO
SCLK
CS
PWM
RST
SI
SO
SCLK
CS
PWM
RST
) is commanded low
33999
33999
CS
,

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