HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 43

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HW-SPAR3E-SK-US-G

Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Datasheets

Specifications of HW-SPAR3E-SK-US-G

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
Character LCD Screen
Overview
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
R
The Spartan
liquid crystal display (LCD). The FPGA controls the LCD via the 4-bit data interface shown
in
a 4-bit data interface to remain compatible with other Xilinx development boards and to
minimize total pin count.
Once mastered, the LCD is a practical way to display a variety of information using
standard ASCII and custom characters. However, these displays are not fast. Scrolling the
display at half-second intervals tests the practical limit for clarity. Compared with the
50 MHz clock available on the board, the display is slow. A PicoBlaze processor efficiently
controls display timing plus the actual content of the display.
Figure
5-1. Although the LCD supports an 8-bit data interface, the Starter Kit board uses
Spartan-3E FPGA
®
-3E FPGA Starter Kit board prominently features a 2-line by 16-character
(M15)
(M18)
(P17)
(R16)
(R15)
Figure 5-1: Character LCD Interface
(L18)
(L17)
www.xilinx.com
SF_D<11>
SF_D<10>
SF_D<9>
SF_D<8>
LCD_RW
SF_CE0
LCD_RS
LCD_E
390Ω
390Ω
390Ω
390Ω
‘1’
DB7
DB6
DB5
DB4
DB[3:0]
E
RS
R/W
D[11:8]
CE0
Intel StrataFlash
Character LCD
Four-bit data
Unused
interface
UG230_c5_01_022006
Chapter 5
43

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