DG-ACC-JBST Digi International, DG-ACC-JBST Datasheet - Page 49

• Manufacturer Part Number: DG-ACC-JBST
• Description: JTAG-BOOSTER FOR NETSILICON 3.3V
• Manufacturer: Digi International
• Series: Digi/FS Forthr
• Type: FLASHr

Specifications of DG-ACC-JBST

• Contents: Programmer and Associated Interface Software
• For Use With/related Products: NetSilicon NS9360, NS9750, NS9775
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FS-9051; FS-9051

Bidirectional GPIOs
ConnectCore XP 270 GPIOs
Most of the peripheral pins on the ConnectCore XP module also double (or triple) as
GPIO pins.
Each GPIO can be configured to be either a generic GPIO pin, one of three alternate
input functions, or one of three alternate output functions. To select any of the
alternate functions, the GPDR register must configure the GPIO to be an input.
Similarly, only GPIOs configured as outputs by the GPDR can be configured for
alternate output functions.
MMCMD, MMDAT[1:0], MMDAT[2] / MMCCS[0], MMDAT[3] / MMCCS[1], MSSDIO,
SSPSCLK, SSPSCLK2, SSPSCLK3, SSPSFRM, SSPSFRM2, SSPSFRM3, LDD[17:0], CIF_LV,
CIF_FV, and the I²C pins PWR_SDA, PWR_SCL, SDA and SCL are special bidirectional
Pin
87 /
H1
89
91 /
J1
93 /
J2
95 /
B5
97 /
D5
99
As inputs, the GPIO pins can be sampled or programmed to generate an
interrupt from either a rising or falling edge.
As outputs, the GPIO pins can be cleared or set individually and can be
preprogrammed to either state when entering sleep mode.
Signal
MA4
GND
MA3
MA2
MA1
MA0
GND
Description
Memory address
bus
GND
Memory address
bus
Memory address
bus
Memory address
bus
Memory address
bus
GND
w w w . d i g i . c o m
Pin
88/U4
90
92 /
T1
94 /
W3
96 /
P4
98 /
W4
100
Signal
MD2
GND
MD9
MD1
MD8
MD0
GND
A b o u t t h e M o d u l e
Description
Memory data bus
GND
Memory data bus
Memory data bus
Memory data bus
Memory data bus
GND
3 7