PIC16F887-I/ML Microchip Technology, PIC16F887-I/ML Datasheet - Page 49

• Manufacturer Part Number: PIC16F887-I/ML
• Description: IC PIC MCU FLASH 8KX14 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F887-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 44-QFN
• Mfg Application Notes: Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: MSSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 53273-916
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.3
PORTB is an 8-bit wide, bidirectional port. The
corresponding
(Register 3-6). Setting a TRISB bit (= 1) will make the
corresponding PORTB pin an input (i.e., put the
corresponding output driver in a High-Impedance mode).
Clearing a TRISB bit (= 0) will make the corresponding
PORTB pin an output (i.e., enable the output driver and
put the contents of the output latch on the selected pin).
Example 3-3 shows how to initialize PORTB.
Reading the PORTB register (Register 3-5) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then written
to the PORT data latch.
The TRISB register (Register 3-6) controls the PORTB
pin output drivers, even when they are being used as
analog inputs. The user should ensure the bits in the
TRISB register are maintained set when using them as
analog inputs. I/O pins configured as analog input always
read ‘0’. Example 3-3 shows how to initialize PORTB.
EXAMPLE 3-3:
3.4
PORTB pins RB<7:0> on the device family device have
an interrupt-on-change option and a weak pull-up
option. The following three sections describe these
PORTB pin functions.
Every PORTB pin on this device family has an
interrupt-on-change option and a weak pull-up option.
© 2009 Microchip Technology Inc.
BANKSEL PORTB
CLRF
BANKSEL TRISB
MOVLW
MOVWF
Note:
PORTB and TRISB Registers
Additional PORTB Pin Functions
PORTB
B‘11110000’ ;Set RB<7:4> as inputs
TRISB
The ANSELH register must be initialized
to configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’.
data
INITIALIZING PORTB
direction
;
;Init PORTB
;
;and RB<3:0> as outputs
;
register
is
PIC16F882/883/884/886/887
TRISB
3.4.1
The ANSELH register (Register 3-4) is used to
configure the Input mode of an I/O pin to analog.
Setting the appropriate ANSELH bit high will cause all
digital reads on the pin to be read as ‘0’ and allow
analog functions on the pin to operate correctly.
The state of the ANSELH bits has no affect on digital
output functions. A pin with TRIS clear and ANSELH
set will still operate as a digital output, but the Input
mode will be analog. This can cause unexpected
behavior
instructions on the affected port.
3.4.2
Each of the PORTB pins has an individually configurable
internal weak pull-up. Control bits WPUB<7:0> enable or
disable each pull-up (see Register 3-7). Each weak
pull-up is automatically turned off when the port pin is
configured as an output. All pull-ups are disabled on a
Power-on Reset by the RBPU bit of the OPTION register.
3.4.3
All of the PORTB pins are individually configurable as an
interrupt-on-change pin. Control bits IOCB<7:0> enable
or disable the interrupt function for each pin. Refer to
Register 3-8.
disabled on a Power-on Reset.
For enabled interrupt-on-change pins, the present value
is compared with the old value latched on the last read
of PORTB to determine which bits have changed or
mismatched the old value. The ‘mismatch’ outputs of
the last read are OR’d together to set the PORTB
Change Interrupt flag bit (RBIF) in the INTCON register.
This interrupt can wake the device from Sleep. The user,
in the Interrupt Service Routine, clears the interrupt by:
a)
b)
A mismatch condition will continue to set flag bit RBIF.
Reading or writing PORTB will end the mismatch
condition and allow flag bit RBIF to be cleared. The latch
holding the last read value is not affected by a MCLR nor
Brown-out Reset. After these Resets, the RBIF flag will
continue to be set if a mismatch is present.
Note:
Any read or write of PORTB. This will end the
mismatch condition.
Clear the flag bit RBIF.
ANSELH REGISTER
WEAK PULL-UPS
INTERRUPT-ON-CHANGE
If a change on the I/O pin should occur when
the read operation is being executed (start of
the Q2 cycle), then the RBIF interrupt flag
may not get set. Furthermore, since a read
or write on a port affects all bits of that port,
care must be taken when using multiple pins
in Interrupt-on-Change mode. Changes on
one pin may not be seen while servicing
changes on another pin.
when
The
interrupt-on-change
executing
DS41291F-page 47
read-modify-write
feature
is