PIC24FJ48GA002-I/SS Microchip Technology, PIC24FJ48GA002-I/SS Datasheet - Page 148

• Manufacturer Part Number: PIC24FJ48GA002-I/SS
• Description: IC PIC MCU FLASH 48K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ48GA002-I/SS

• Core Size: 16-Bit
• Program Memory Size: 48KB (16K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ64GA004 FAMILY
FIGURE 15-3:
FIGURE 15-4:
DS39881D-page 148
Note
PROCESSOR 1 (SPI Enhanced Buffer Master)
Note
1:
2:
1:
2:
PROCESSOR 1 (SPI Master)
MSTEN (SPIxCON1<5>) = 1 and
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
SPIBEN (SPIxCON2<0>) = 1
MSTEN (SPIxCON1<5>) = 1)
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
MSb
MSb
SPI MASTER/SLAVE CONNECTION (STANDARD MODE)
SPI MASTER/SLAVE CONNECTION (ENHANCED BUFFER MODES)
8-Level FIFO Buffer
Serial Transmit Buffer
Serial Receive Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
(SPIxRXB)
Shift Register
(SPIxBUF)
(SPIxTXB)
SPIx Buffer
(SPIxSR)
(2)
(2)
(2)
(2)
LSb
LSb
SDOx
SCKx
SDIx
SDOx
SDIx
SCKx
SSx
Serial Clock
Serial Clock
SSEN (SPIxCON1<7>) = 1 and MSTEN (SPIxCON1<5>) = 0
SDIx
SDOx
SCKx
SSx
SCKx
SDIx
SDOx
SSx
PROCESSOR 2 (SPI Enhanced Buffer Slave)
(1)
(1)
PROCESSOR 2 (SPI Slave)
MSb
Serial Transmit Buffer
Serial Receive Buffer
MSTEN (SPIxCON1<5>) = 0 and
SSEN (SPIxCON1<7>) = 1,
SPIBEN (SPIxCON2<0>) = 1
Shift Register
(SPIxRXB)
(SPIxTXB)
(SPIxBUF)
SPIx Buffer
MSb
(SPIxSR)
8-Level FIFO Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
(2)
(2)
(2)
 2010 Microchip Technology Inc.
LSb
(2)
LSb