PIC24FJ48GA002-I/SS Microchip Technology, PIC24FJ48GA002-I/SS Datasheet - Page 197

• Manufacturer Part Number: PIC24FJ48GA002-I/SS
• Description: IC PIC MCU FLASH 48K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ48GA002-I/SS

• Core Size: 16-Bit
• Program Memory Size: 48KB (16K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 21-5:
REGISTER 21-6:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-13
bit 12-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-13
bit 12-0
Note 1:
PCFG7
CSSL7
PCFG15
CSSL15
R/W-0
R/W-0
R/W-0
R/W-0
(1)
(1)
Analog channels AN6, AN7 and AN8 are unavailable on 28-pin devices; leave these corresponding bits
set.
Analog channels AN6, AN7 and AN8 are unavailable on 28-pin devices; leave these corresponding bits
cleared.
PCFG15: Analog Input Pin Configuration Control bits
1 = Band gap voltage reference is disabled
0 = Band gap voltage reference enabled
Unimplemented: Read as ‘0’
PCFG12:PCFG0: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled, A/D samples pin voltage
CSSL15: Band Gap Reference Input Pin Scan Selection bits
1 = Band gap voltage reference channel selected for input scan
0 = Band gap voltage reference channel omitted from input scan
Unimplemented: Read as ‘0’
CSSL12:CSSL0: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
PCFG6
CSSL6
R/W-0
R/W-0
U-0
U-0
—
—
AD1PCFG: A/D PORT CONFIGURATION REGISTER
AD1CSSL: A/D INPUT SCAN SELECT REGISTER
(1)
(1)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
CSSL5
R/W-0
R/W-0
U-0
U-0
—
—
PCFG12
CSSL12
PCFG4
CSSL4
R/W-0
R/W-0
R/W-0
R/W-0
PIC24FJ64GA004 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG11
CSSL11
PCFG3
CSSL3
R/W-0
R/W-0
R/W-0
R/W-0
(1)
PCFG10
(1)
CSSL10
PCFG2
CSSL2
R/W-0
R/W-0
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
PCFG9
PCFG1
CSSL9
CSSL1
R/W-0
R/W-0
R/W-0
R/W-0
DS39881D-page 197
PCFG8
CSSL8
PCFG0
CSSL0
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
(1)
bit 8
bit 0
(1)