MC56F8037VLH Freescale Semiconductor, MC56F8037VLH Datasheet - Page 129

• Manufacturer Part Number: MC56F8037VLH
• Description: IC DSP 16BIT DUAL 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8037VLH

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 53
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8037EVM
• Interface Type: SCI, SPI, I2C
• Minimum Operating Temperature: - 40 C
• Package: 64LQFP
• Family Name: 56F8xxx
• Maximum Speed: 32 MHz
• On-chip Adc: 2(8-chx10-bit)
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 5
• For Use With: MC56F8037EVM - BOARD EVAL FOR MC56F8037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.8 Interrupts
The SIM generates no interrupts.
Part 7 Security Features
The 56F8037/56F8027 offers security features intended to prevent unauthorized users from reading the
contents of the flash memory (FM) array. The 56F8037/56F8027’s flash security consists of several
hardware interlocks that prevent unauthorized users from gaining access to the flash array.
After flash security is set, an authorized user is still able to access on-chip memory if a user-defined
software subroutine, which reads and transfers the contents of internal memory via serial communication
peripherals, is included in the application software.
7.1 Operation with Security Enabled
After the user has programmed flash with the application code, the 56F8037/56F8027 can be secured by
programming the security word $0002 into program memory location $00 7FF7. This non-volatile word
will keep the device secured through reset and through power-down of the device. Refer to the flash
memory chapter in the 56F802x and 56F803x Peripheral Reference Manual for the details. When flash
security mode is enabled, the 56F8037/56F8027 will disable the core EOnCE debug capabilities. Normal
Freescale Semiconductor
SYS_CLK_DIV2
CKGEN_RST
2X SYS_CLK
SYS_CLK_D
MSTR_OSC
PERIP_RST
CORE_RST
SYS_CLK
RST
Maximum Delay = 64 OSC_CLK cycles for POR reset extension and 32 OSC_CLK cycles
Figure 6-29 Timing Relationships of Reset Signal to Clocks
Switch on falling OSC_CLK
96 MSTR_OSC cycles
56F8037/56F8027 Data Sheet, Rev. 7
32 SYS_CLK cycles delay
for Combined reset extension
Switch on falling SYS_CLK
Switch on falling SYS_CLK
32 SYS_CLK cycles delay
Interrupts
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