MC56F8037VLH Freescale Semiconductor, MC56F8037VLH Datasheet - Page 151

• Manufacturer Part Number: MC56F8037VLH
• Description: IC DSP 16BIT DUAL 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8037VLH

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 53
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8037EVM
• Interface Type: SCI, SPI, I2C
• Minimum Operating Temperature: - 40 C
• Package: 64LQFP
• Family Name: 56F8xxx
• Maximum Speed: 32 MHz
• On-chip Adc: 2(8-chx10-bit)
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 5
• For Use With: MC56F8037EVM - BOARD EVAL FOR MC56F8037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.8 Reset, Stop, Wait, Mode Select, and Interrupt Timing
Note:
Freescale Semiconductor
1. In the formulas, T = system clock cycle and T
2. Parameters listed are guaranteed by design.
3. During Power-On Reset, it is possible to use the 56F8037/56F8027 internal reset stretching circuitry to extend this period to
Minimum RESET Assertion Duration
Minimum GPIO pin Assertion for Interrupt
RESET deassertion to First Address Fetch
Delay from Interrupt Assertion to Fetch of first
instruction (exiting Stop)
8MHz (used during Reset and Stop modes), T = 125ns.
2^21T.
GPIO pin
(Input)
All address and data buses described here are internal.
Table 10-13 Reset, Stop, Wait, Mode Select, and Interrupt Timing
Characteristic
Figure 10-6 GPIO Interrupt Timing (Negative Edge-Sensitive)
56F8037/56F8027 Data Sheet, Rev. 7
3
osc
= oscillator clock cycle. For an operating frequency of 32MHz, T = 31.25ns. At
Symbol
T
t
t
RDA
t
t
IW
RA
IW
IF
96T
Typical Min
OSC
4T
2T
—
+ 64T
Reset, Stop, Wait, Mode Select, and Interrupt Timing
97T
Typical Max
OSC
6T
—
—
+ 65T
Unit
ns
ns
ns
ns
1,2
See Figure
10-6
—
—
—
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