MC56F8355VFGE Freescale Semiconductor, MC56F8355VFGE Datasheet - Page 23

• Manufacturer Part Number: MC56F8355VFGE
• Description: IC DSP 16BIT 60MHZ 128-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8355VFGE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 49
• Program Memory Size: 264KB (132K x 16)
• Program Memory Type: FLASH
• Ram Size: 10K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 128-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 49
• Data Ram Size: 20 KB
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Preliminary
Signal Name
(GPIOE1)
(GPIOD6)
(GPIOE0)
GPIOD0
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
(CS2)
(CS3)
(CS4)
(CS5)
(CS6)
(CS7)
TXD0
RXD0
TXD1
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Pin No.
42
43
44
45
46
47
40
7
8
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Type
Input
disabled,
disabled,
output is
output is
pullup is
pullup is
enabled
In reset,
enabled
enabled
In reset,
enabled
During
56F8355 Technical Data, Rev. 17
Reset
pullup
pullup
State
Input,
Input,
Port D GPIO — These six GPIO pins can be individually
programmed as input or output pins.
Chip Select — CS2 - CS7 may be programmed within the EMI
module to act as chip selects for specific areas of the external
memory map. Depending upon the state of the DRV bit in the EMI
bus control register (BCR), CS2 - CS7 are tri-stated when the
external bus is inactive.
After reset, these pins are configured as GPIO.
To deactivate the internal pullup resistor, clear the appropriate
GPIO bit in the GPIOD_PUR register.
Example: GPIOD0, clear bit 0 in the GPIOD_PUR register.
Transmit Data — SCI0 transmit data output
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pullup resistor, clear bit 0 in the
GPIOE_PUR register.
Receive Data — SCI0 receive data input
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pullup resistor, clear bit 1 in the
GPIOE_PUR register.
Transmit Data — SCI1 transmit data output
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pullup resistor, set bit 6 in the
GPIOD_PUR register.
Signal Description
Signal Pins
23