MC56F8355VFGE Freescale Semiconductor, MC56F8355VFGE Datasheet - Page 69

• Manufacturer Part Number: MC56F8355VFGE
• Description: IC DSP 16BIT 60MHZ 128-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8355VFGE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 49
• Program Memory Size: 264KB (132K x 16)
• Program Memory Type: FLASH
• Ram Size: 10K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 128-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 49
• Data Ram Size: 20 KB
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Preliminary
FCMB2_DATA
FCMB3_CONTROL
FCMB3_ID_HIGH
FCMB3_ID_LOW
FCMB3_DATA
FCMB3_DATA
FCMB3_DATA
FCMB3_DATA
FCMB4_CONTROL
FCMB4_ID_HIGH
FCMB4_ID_LOW
FCMB4_DATA
FCMB4_DATA
FCMB4_DATA
FCMB4_DATA
FCMB5_CONTROL
FCMB5_ID_HIGH
FCMB5_ID_LOW
FCMB5_DATA
FCMB5_DATA
FCMB5_DATA
FCMB5_DATA
FCMB6_CONTROL
FCMB6_ID_HIGH
FCMB6_ID_LOW
FCMB6_DATA
FCMB6_DATA
FCMB6_DATA
FCMB6_DATA
Register Acronym
Table 4-38 FlexCAN Registers Address Map (Continued)
FlexCAN is NOT available in the 56F8155 device
Address Offset
56F8355 Technical Data, Rev. 17
(FC_BASE = $00 F800)
$5A
$5B
$5C
$5D
$5E
$6A
$6B
$6C
$6D
$6E
$56
$58
$59
$60
$61
$62
$63
$64
$65
$66
$68
$69
$70
$71
$72
$73
$74
$75
$76
Message Buffer 2 Data Register
Reserved
Message Buffer 3 Control / Status Register
Message Buffer 3 ID High Register
Message Buffer 3 ID Low Register
Message Buffer 3 Data Register
Message Buffer 3 Data Register
Message Buffer 3 Data Register
Message Buffer 3 Data Register
Reserved
Message Buffer 4 Control / Status Register
Message Buffer 4 ID High Register
Message Buffer 4 ID Low Register
Message Buffer 4 Data Register
Message Buffer 4 Data Register
Message Buffer 4 Data Register
Message Buffer 4 Data Register
Reserved
Message Buffer 5 Control / Status Register
Message Buffer 5 ID High Register
Message Buffer 5 ID Low Register
Message Buffer 5 Data Register
Message Buffer 5 Data Register
Message Buffer 5 Data Register
Message Buffer 5 Data Register
Reserved
Message Buffer 6 Control / Status Register
Message Buffer 6 ID High Register
Message Buffer 6 ID Low Register
Message Buffer 6 Data Register
Message Buffer 6 Data Register
Message Buffer 6 Data Register
Message Buffer 6 Data Register
Register Description
Peripheral Memory Mapped Registers
69