C8051F504-IM Silicon Laboratories Inc, C8051F504-IM Datasheet - Page 249

• Manufacturer Part Number: C8051F504-IM
• Description: IC 8051 MCU 32K FLASH 48-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F50xr

Specifications of C8051F504-IM

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-QFN
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 32-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1527 - KIT DEV FOR C8051F50X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1519-5

SFR Definition 24.2. SMOD0: Serial Port 0 Control
SFR Address = 0xA9; SFR Page = 0x00
Name
Reset
Bit
6:5 S0PT[1:0] Parity Type Select Bits.
3:2 S0DL[1:0] Data Length.
Type
7
4
1
0
Bit
MCE0
Name
XBE0
SBL0
PE0
MCE0
R/W
7
0
Multiprocessor Communication Enable.
0: RI0 will be activated if stop bit(s) are 1.
1: RI0 will be activated if stop bit(s) and extra bit are 1. Extra bit must be enabled using
XBE0.
00: Odd Parity
01: Even Parity
10: Mark Parity
11: Space Parity.
Parity Enable.
This bit enables hardware parity generation and checking. The parity type is selected
by bits S0PT[1:0] when parity is enabled.
0: Hardware parity is disabled.
1: Hardware parity is enabled.
00: 5-bit data
01: 6-bit data
10: 7-bit data
11: 8-bit data
Extra Bit Enable.
When enabled, the value of TBX0 will be appended to the data field
0: Extra Bit is disabled.
1: Extra Bit is enabled.
Stop Bit Length.
0: Short—stop bit is active for one bit time
1: Long—stop bit is active for two bit times (data length = 6, 7, or 8 bits), or 1.5 bit times
(data length = 5 bits).
R/W
6
0
S0PT[1:0]
R
5
0
PE0
R/W
Rev. 1.2
4
0
Function
R/W
3
1
S0DL[1:0]
C8051F50x/F51x
R/W
2
1
XBE0
R/W
1
0
SBL0
R/W
0
0
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