Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 101

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Z8F082AHH020SG2156

Manufacturer Part Number
Z8F082AHH020SG2156
Description
IC ENCORE XP MCU FLASH 8K
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F082AHH020SG2156

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q5278375
CP
Compare
CP dst, src
UM012811-0904
Mnemonic
CP
CP
CP
CP
CP
CP
Operation
Description
Flags
Attributes
Escaped Mode Addressing
dst - src
The source operand is compared to (subtracted from) the destination operand and the flags
are set according to the results of the operation. The contents of both the source and desti-
nation operands are unaffected.
Using Escaped Mode Addressing, address modes R or IR specify a Working Register. If
the high nibble of the source or destination address is
inferred. For example, if Working Register R12 (
use
to
C
Z
S
V
D
H
Destination, Source
r1, r2
r1, @r2
R1, R2
R1, @R2
R1, IM
@R1, IM
EFH
ECH
, either set the Working Group Pointer, RP[7:4], to
Set if a borrow is required by bit 7; reset otherwise.
Set if the result is zero; reset otherwise.
Set if Bit 7 of the result is set; reset otherwise.
Set if an arithmetic overflow occurs; reset otherwise.
Unaffected.
Unaffected.
as the destination operand in the opcode. To access Registers with addresses
Opcode (Hex)
A2
A3
A4
A5
A6
A7
{r1, r2}
R1
R1
Operand 1
{r1, r2}
R2
R2
CH
) is the desired destination operand,
eZ8 CPU Instruction Set Description
EH
Operand 2
R1
R1
IM
IM
(1110B), a Working Register is
EH
or use indirect addressing.
Operand 3
User Manual
eZ8 CPU
E0H
91

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