Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 186
Z8F082AHH020SG2156
Manufacturer Part Number
Z8F082AHH020SG2156
Description
IC ENCORE XP MCU FLASH 8K
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F082AHH020SG2156.pdf
(240 pages)
Specifications of Z8F082AHH020SG2156
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q5278375
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SUB
Subtract
SUB dst, src
UM012811-0904
Mnemonic
SUB
SUB
SUB
SUB
SUB
SUB
Operation
Description
Flags
Attributes
Escaped Mode Addressing
dst
This instruction subtracts the source operand from the destination operand. The destina-
tion operand stores the result. The source operand contents are unaffected. The eZ8 CPU
performs subtraction by adding the two’s complement of the source operand to the desti-
nation operand.
Using Escaped Mode Addressing, address modes R or IR specify a Working Register. If
the high nibble of the source or destination address is
inferred. For example, if Working Register R12 (
use
to
C
Z
S
V
D
H
Destination, Source
r1, r2
r1, @r2
R1, R2
R1, @R2
R1, IM
@R1, IM
EFH
←
ECH
dst - src
, either set the Working Group Pointer, RP[7:4], to
Set if a borrow is required by bit 7; reset otherwise.
Set if the result is zero; reset otherwise.
Set if the result is negative; reset otherwise.
Set if an arithmetic overflow occurs; reset otherwise.
Set to 1.
Set if a borrow is required by bit 3; reset otherwise.
as the destination operand in the opcode. To access Registers with addresses
Opcode (Hex)
22
23
24
25
26
27
Operand 1
{r1, r2}
{r1, r2}
R2
R2
R1
R1
CH
) is the desired destination operand,
eZ8 CPU Instruction Set Description
EH
Operand 2
—
—
R1
R1
IM
IM
(1110B), a Working Register is
EH
or use indirect addressing.
Operand 3
—
—
—
—
—
—
User Manual
eZ8 CPU
E0H
176
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