Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 26

• Manufacturer Part Number: Z8F082AHH020SG2156
• Description: IC ENCORE XP MCU FLASH 8K
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F082AHH020SG2156

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q5278375

UM012811-0904
or modified by any instruction that uses 8-bit addressing. To change to a different page,
use the Set Register Pointer (SRP) instruction to change the value of the Register Pointer.
(Load instructions, LD or LDX, can also be used but require more bytes of code space).
Working Register Addressing of the Register File
Each Register File page is logically divided into 16 Working Register Groups of 16 regis-
ters each. The Working Registers within each Working Register Group are accessible
using 4-bit addressing. The high nibble of the eZ8 CPU Register Pointer (RP) contains the
base address of the active Working Register Group, referred to as the Working Group
Pointer. When accessing one of the Working Registers, the 4-bit address of the Working
Register is combined within the Page Pointer and the Working Group Pointer to form the
full 12-bit address {RP[3:0], RP[7:4], Address[3:0]}. Figure 4 illustrates this operation.
Figure 4. Working Register Addressing Example
Because Working Registers can typically be specified using fewer operand bytes, there are
fewer bytes of code needed, which reduces execution time. In addition, when processing
interrupts or changing tasks, the Register Pointer speeds context switching. The Set Regis-
ter Pointer (SRP) instruction sets the contents of the Register Pointer.
16-bit Register Pairs
Register data may be accessed as a 16-bit word using Register Pairs. In this case, the most
significant byte (MSB) of the data is stored in the even numbered register, while the least
significant byte (LSB) is stored in the next higher odd numbered register (see Figure 5).
Address the register pair using the address of the MSB.
Bit
Bit
11
Working Group
7
0
0
1
0
Register Pointer
Full 12-bit Register Address (376H)
1
1
1
1
0
0
0
1
Page
1
1
Bit
0
1
1
Working Register
0
0
4-bit Address
INC R6
1
1
1
1
Bit
0
0
0
1
1
1
0
Address Space
User Manual
eZ8 CPU
16