Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 200

• Manufacturer Part Number: Z8F082AHH020SG2156
• Description: IC ENCORE XP MCU FLASH 8K
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F082AHH020SG2156

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q5278375

TMX
Test Under Mask using Extended Addressing
TMX dst, src
UM012811-0904
Mnemonic Destination, Source
TMX
TMX
Operation
Description
Flags
Attributes
Escaped Mode Addressing
ER1, ER2
ER1, IM
dst AND src
This instruction tests selected bits in the destination operand for a logical 0 value. Specify
the bits to be tested by setting a 1 bit in the corresponding bit position in the source oper-
and (the mask). The TMX instruction AND’s the destination with the source operand
(mask). Check the Zero flag to determine the result. If the Z flag is set, the tested bits are
0. When a TMX operation is completed, the destination and source operands retain their
original values.
Using Escaped Mode Addressing, address mode ER for the source or destination can spec-
ify a Working Register with 4-bit addressing.
If the high byte of the source or destination address is
ter is inferred. For example, the operand
bit address is given by {RP[3:0], RP[7:4], 3H}.
To access Registers on Page EH (addresses E00H to EFFH), set the Page Pointer, RP[3:0],
to
C
Z
S
V
D
H
EH
and set the Working Group Pointer, RP[7:4], to the desired Working Group.
Unaffected.
Set if the result is zero; reset otherwise.
Set if the result is negative; reset otherwise.
Reset to 0.
Unaffected.
Unaffected.
Opcode (Hex)
78
79
Operand 1
ER2[11:4]
IM
EE3H
selects Working Register R3. The full 12-
Operand 2
{ER2[3:0], ER1[11:8]} ER1[7:0]
{0H, ER1[11:8]}
eZ8 CPU Instruction Set Description
EEH
(11101110B), a Working Regis-
Operand 3
ER1[7:0]
User Manual
eZ8 CPU
190