ST72F361J9T6 STMicroelectronics, ST72F361J9T6 Datasheet - Page 13

• Manufacturer Part Number: ST72F361J9T6
• Description: IC MCU 8BIT 60K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F361J9T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: LINSCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST72F36X-SK/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Legend: x = undefined, R/W = read/write
Notes:
1. The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values
of the I/O pins are returned instead of the DR register contents.
2. The bits associated with unavailable pins must always keep their reset value.
Address
004Ah
004Bh
004Ch
004Dh
004Eh
005Ah
005Bh
005Ch
005Dh
005Eh
0048h
0049h
004Fh
0050h
0051h
0052h
0053h
0054h
0055h
0056h
0057h
0058h
0059h
005Fh
0060h
0061h
0062h
0063h
0064h
0065h
0066h
0067h
0068h
007Fh
to
(LIN Master/
(LIN Master)
LINSCI1
LINSCI2
TIMER
16-BIT
Slave)
Block
SCI1ISR
SCI1DR
SCI1BRR
SCI1CR1
SCI1CR2
SCI1CR3
SCI1ERPR
SCI1ETPR
T16CR2
T16CR1
T16CSR
T16IC1HR
T16IC1LR
T16OC1HR
T16OC1LR
T16CHR
T16CLR
T16ACHR
T16ACLR
T16IC2HR
T16IC2LR
T16OC2HR
T16OC2LR
SCI2SR
SCI2DR
SCI2BRR
SCI2CR1
SCI2CR2
SCI2CR3
SCI2ERPR
SCI2ETPR
Register
Label
SCI1 Status Register
SCI1 Data Register
SCI1 Baud Rate Register
SCI1 Control Register 1
SCI1 Control Register 2
SCI1Control Register 3
SCI1 Extended Receive Prescaler Register
SCI1 Extended Transmit Prescaler Register
Timer Control Register 2
Timer Control Register 1
Timer Control/Status Register
Timer Input Capture 1 High Register
Timer Input Capture 1 Low Register
Timer Output Compare 1 High Register
Timer Output Compare 1 Low Register
Timer Counter High Register
Timer Counter Low Register
Timer Alternate Counter High Register
Timer Alternate Counter Low Register
Timer Input Capture 2 High Register
Timer Input Capture 2 Low Register
Timer Output Compare 2 High Register
Timer Output Compare 2 Low Register
SCI2 Status Register
SCI2 Data Register
SCI2 Baud Rate Register
SCI2 Control Register 1
SCI2 Control Register 2
SCI2 Control Register 3
SCI2 Extended Receive Prescaler Register
SCI2 Extended Transmit Prescaler Register
Reserved area (24 bytes)
Reserved Area (1 byte)
Register Name
Status
Reset
FCh
FCh
C0h
FFh
FFh
C0h
00h
00h
00h
00h
00h
00h
00h
00h
80h
00h
80h
00h
00h
00h
00h
00h
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remarks
ST72361
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