STR710RZH6 STMicroelectronics, STR710RZH6 Datasheet - Page 29

• Manufacturer Part Number: STR710RZH6
• Description: MCU ARM7 32BIT 64-LFBGA
• Manufacturer: STMicroelectronics
• Series: STR7r

Specifications of STR710RZH6

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, HDLC, I²C, SmartCard, SPI, UART/USART, USB
• Peripherals: PWM, WDT
• Number Of I /o: 48
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LFBGA
• Processor Series: STR710x
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN, EMI, USB
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MCBSTR7, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: STX-PRO/RAIS, STX-RLINK, STR79-RVDK/CPP, STR79-RVDK, STR79-RVDK/UPG
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 4 Channel
• For Use With: MCBSTR7UME - MCBSTR7 + ULINK-ME DEV KITMCBSTR7 - BOARD EVAL STM STR71X SERIES497-4516 - BOARD EVAL FOR STR71X SER MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

STR71xF
3.6
Table 8.
INPUT
OUTPUT
Configuration Mode
TTL Input Floating
CMOS Input Floating
CMOS Input Pull-Down
(IPUPD)
CMOS Input Pull-Up (IPUPD)
Analog input
Output Open-Drain
Output Push-Pull
Alternate Function Open-Drain CMOS floating
Alternate Function Push-Pull
I/O port configuration
Port bit configuration table
Legend:
AIN: Analog Input
CMOS: CMOS Input levels
IPUPD: Input Pull Up /Pull Down
TTL: TTL Input levels
N.A.: not applicable. In Output mode, a read access to the port gets the output latch value.
CMOS floating
CMOS floating
TTL floating
CMOS Pull-
Pull-Up
CMOS
buffer
Down
Input
N.A.
N.A.
AIN
last value
access
I/O pin
written
I/O pin
I/O pin
I/O pin
I/O pin
I/O pin
I/O pin
Read
0
register
PxD
don’t care
don’t care
don’t care
don’t care
don’t care
access
Write
0 or 1
0 or 1
0
1
register
PxC2
0
0
1
0
0
0
1
1
1
System architecture
register
PxC1
0
1
1
1
0
0
0
1
1
register
PxC0
1
0
1
1
0
0
1
0
1
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