MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 604

• Manufacturer Part Number: MC9S12XA256CAL
• Description: IC MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XA256CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XA
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 16 Channel)
• Package: 112LQFP
• Family Name: HCS12
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 16 Interrupt (S12XINTV1)
16.3.1.4
The eight register window visible at addresses INT_CFDATA0–7 contains the configuration data for the
block of eight interrupt requests (out of 128) selected by the interrupt configuration address register
(INT_CFADDR) in ascending order. INT_CFDATA0 represents the interrupt configuration data register
of the vector with the lowest address in this block, while INT_CFDATA7 represents the interrupt
configuration data register of the vector with the highest address, respectively.
1
1
1
1
604
Address: 0x0128
Address: 0x0129
Address: 0x012A
Address: 0x012B
Please refer to the notes following the PRIOLVL[2:0] description below.
Please refer to the notes following the PRIOLVL[2:0] description below.
Please refer to the notes following the PRIOLVL[2:0] description below.
Please refer to the notes following the PRIOLVL[2:0] description below.
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
RQST
RQST
RQST
RQST
Interrupt Request Configuration Data Registers (INT_CFDATA0–7)
0
0
0
0
7
7
7
7
Figure 16-6. Interrupt Request Configuration Data Register 0 (INT_CFDATA0)
Figure 16-7. Interrupt Request Configuration Data Register 1 (INT_CFDATA1)
Figure 16-8. Interrupt Request Configuration Data Register 2 (INT_CFDATA2)
Figure 16-9. Interrupt Request Configuration Data Register 3 (INT_CFDATA3)
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
0
0
0
0
6
6
6
6
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
0
0
0
0
0
5
5
5
5
0
0
0
0
0
0
0
0
4
4
4
4
0
0
0
0
0
0
0
0
3
3
3
3
0
0
0
0
2
2
2
2
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
Freescale Semiconductor
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1